| Year |
Citation |
Score |
| 2014 |
Esmaeili SE, Al-Khalili AJ. 10 GHz throughput FinFET dual-edge triggered flip-flops Canadian Conference On Electrical and Computer Engineering. DOI: 10.1109/CCECE.2014.6900947 |
0.323 |
|
| 2012 |
Nourivand A, Al-Khalili AJ, Savaria Y. Postsilicon tuning of standby supply voltage in srams to reduce yield losses due to parametric data-retention failures Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 20: 29-41. DOI: 10.1109/Tvlsi.2010.2093938 |
0.332 |
|
| 2012 |
Esmaeili SE, Islam R, Al-Khalili AJ, Cowan GER. Dual-edge triggered sense amplifier flip-flop utilizing an improved scheme to reduce area, power, and complexity 2012 19th Ieee International Conference On Electronics, Circuits, and Systems, Icecs 2012. 292-295. DOI: 10.1109/ICECS.2012.6463565 |
0.312 |
|
| 2012 |
Esmaeili SE, Farhangi AM, Al-Khalili AJ, Cowan GER. Clock tree structure with reduced wire length using the matched-delay skew compensation technique 2012 25th Ieee Canadian Conference On Electrical and Computer Engineering: Vision For a Greener Future, Ccece 2012. DOI: 10.1109/CCECE.2012.6335054 |
0.307 |
|
| 2012 |
Valaee A, Al-Khalili AJ. High-performance low-power sensing scheme for nanoscale SRAMs Iet Computers and Digital Techniques. 6: 406-413. DOI: 10.1049/Iet-Cdt.2012.0038 |
0.409 |
|
| 2011 |
Valaee A, Al-Khalili AJ. SRAM read-assist scheme for high performance low power applications 2011 International Soc Design Conference, Isocc 2011. 179-182. |
0.345 |
|
| 2010 |
Esmaeili SE, Al-Khalili AJ, Cowan GER. Dual-edge triggered sense amplifier flip-flop for resonant clock distribution networks Iet Computers and Digital Techniques. 4: 499-514. DOI: 10.1049/Iet-Cdt.2010.0005 |
0.392 |
|
| 2010 |
Esmaeili SE, Farhangi AM, Al-Khalili AJ, Cowan GER. Skew compensation in energy recovery clock distribution networks Iet Computers and Digital Techniques. 4: 56-72. DOI: 10.1049/Iet-Cdt.2008.0155 |
0.393 |
|
| 2009 |
Zarrabi H, Al-Khalili AJ, Savaria Y. An interconnect-aware delay model for dynamic voltage scaling in nm technologies Proceedings of the Acm Great Lakes Symposium On Vlsi, Glsvlsi. 45-49. DOI: 10.1145/1531542.1531557 |
0.312 |
|
| 2008 |
Athow JL, Al-Khalili AJ. Placement algorithm for multiplier-based FPGA circuits Proceedings of the International Conference On Microelectronics, Icm. 167-170. DOI: 10.1109/ICM.2008.5393533 |
0.308 |
|
| 2007 |
Vitoroulis K, Al-Khalili AJ. Performance of parallel prefix adders implemented with FPGA technology 2007 Ieee North-East Workshop On Circuits and Systems, Newcas 2007. 498-501. DOI: 10.1109/NEWCAS.2007.4487969 |
0.3 |
|
| 2005 |
Saaied H, Al-Khalili D, Al-Khalili AJ, Nekili M. Simultaneous adaptive wire adjustment and local topology modification for tuning a bounded-skew clock tree Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 24: 1637-1643. DOI: 10.1109/Tcad.2005.852034 |
0.357 |
|
| 2005 |
Kabbani A, Al-Khalili D, Al-Khalili AJ. Delay analysis of CMOS gates using modified logical effort model Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 24: 937-947. DOI: 10.1109/Tcad.2005.847892 |
0.368 |
|
| 2005 |
Kabbani A, Al-Khalili D, Al-Khalili AJ. Logical path delay distribution and transistor sizing 3rd International Ieee Northeast Workshop On Circuits and Systems Conference, Newcas 2005. 2005: 391-394. DOI: 10.1109/NEWCAS.2005.1496701 |
0.307 |
|
| 2004 |
Deng S, Al-khalili AJ. A technology portable analytical model for DSM CMOS inverter short-circuit power estimation Conference Proceedings - 2nd Annual Ieee Northeast Workshop On Circuits and Systems, Newcas 2004. 101-104. |
0.334 |
|
| 2004 |
Kabbani A, Al-Khalili D, Al-Khalili AJ. Delay macro modeling of CMOS gates using modified logical effort technique Proceedings Icse 2004 - 2004 Ieee International Conference On Semiconductor Electronics. 56-60. |
0.316 |
|
| 2003 |
Kabbani A, Al-Khalili D, Al-Khalili AJ. Technology-portable analytical model for DSM CMOS inverter transition-time estimation Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 22: 1177-1187. DOI: 10.1109/Tcad.2003.816215 |
0.353 |
|
| 2001 |
Pillai RVK, Shah SYA, Al-Khalili AJ, Al-Khalili D. Low power floating point MAFs-a comparative study 6th International Symposium On Signal Processing and Its Applications, Isspa 2001 - Proceedings; 6 Tutorials in Communications, Image Processing and Signal Analysis. 1: 284-287. DOI: 10.1109/ISSPA.2001.949833 |
0.306 |
|
| 2001 |
Pillai RVK, Al-Khalili D, Al-Khalili AJ, Shah SYA. Low power approach to floating point adder design for DSP applications Journal of Vlsi Signal Processing Systems For Signal, Image, and Video Technology. 27: 195-213. DOI: 10.1023/A:1008140025773 |
0.326 |
|
| 2000 |
Sun P, Al-Khalili AJ, Al-Khalili D. A CAD tool for first hand CMOS circuit selection Proceedings of the Ieee International Conference On Electronics, Circuits, and Systems. 1: 165-168. DOI: 10.1109/ICECS.2000.911509 |
0.321 |
|
| 1999 |
Kabbani A, Al-Khalili AJ. Estimation of ground bounce effects on CMOS circuits Proceedings - Ieee International Symposium On Circuits and Systems. 1. DOI: 10.1109/6144.774752 |
0.336 |
|
| 1999 |
Pillai RVK, Al-Khalili D, Al-Khalili AJ. An IEEE Compliant Floating Point MAF Ieee Transactions On Very Large Scale Integration Systems. 149-160. DOI: 10.1007/978-0-387-35498-9_14 |
0.386 |
|
| 1997 |
Ahmad H, Al-Khalili AJ, Landsberger LM, Kahrizi M. A two-dimensional micromachined accelerometer Ieee Transactions On Instrumentation and Measurement. 46: 18-26. DOI: 10.1109/19.552151 |
0.338 |
|
| 1997 |
Pagey S, Al-Khalili AJ. Universal TSC module and its application to the design of TSC circuits Microelectronics Journal. 28: 29-39. DOI: 10.1016/S0026-2692(96)00023-7 |
0.402 |
|
| 1993 |
Dewan J, Haroun BS, Al-khalili AJ. Performance analysis and design of optimized static random access memory (SRAM) Microelectronics Journal. 24: 505-512. DOI: 10.1016/0026-2692(93)90119-Y |
0.378 |
|
| 1990 |
Al-Khalili AJ, Zhu Y, Al-Khalili D. A Module Generator for Optimized CMOS Buffers Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 9: 1028-1046. DOI: 10.1109/43.62730 |
0.347 |
|
| 1989 |
Dantu RV, Dimopoulos NJ, Patel RV, Al-Khalili AJ. Micromanipulator Vision for Wafer Probing Ieee Transactions On Semiconductor Manufacturing. 2: 114-117. DOI: 10.1109/66.29680 |
0.325 |
|
| 1987 |
Al-Khalili AJ, Brown A, Al-Khalili DM. A Microprocessor-Based Flaw Detection System for Offshore Steel Structures Ieee Transactions On Industrial Electronics. 139-147. DOI: 10.1109/Tie.1987.350945 |
0.314 |
|
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