Mitchell A. Thornton
Affiliations: | Computer Science and Engineering | Southern Methodist University, Dallas, TX, United States |
Area:
Computer Science, Electronics and Electrical EngineeringGoogle:
"Mitchell Thornton"Children
Sign in to add traineeLun Li | grad student | 2006 | SMU |
David D. Feinstein | grad student | 2008 | SMU |
Satyendra R. Datla | grad student | 2009 | SMU |
Diana M. Easton | grad student | 2011 | SMU |
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Publications
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Smith K, Soeken M, Schmitt B, et al. (2020) Using ZDDs in the mapping of quantum circuits Arxiv: Quantum Physics. 318: 106-118 |
Niemann P, Wille R, Miller DM, et al. (2016) QMDDs: Efficient Quantum Function Representation and Manipulation Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 35: 86-99 |
Gupta SD, Thornton MA. (2016) A Fixed-Point Squaring Algorithm Using an Implicit Arbitrary Radix Number System Ieee Journal On Emerging and Selected Topics in Circuits and Systems |
Thornton MA. (2015) Simulation and Implication Using a Transfer Function Model for Switching Logic Ieee Transactions On Computers. 64: 3580-3590 |
Smith KN, Thornton MA. (2015) A multiple-valued logic synthesis tool for optical computing elements 2015 Ieee Dallas Circuits and Systems Conference: Enabling Technologies For a Connected World, Dcas 2015 |
Thornton MA. (2014) Modeling digital switching circuits with linear algebra Synthesis Lectures On Digital Circuits and Systems. 44: 1-145 |
Feinstein DY, Thornton MA. (2012) Using the asynchronous paradigm for reversible sequential circuit implementation Proceedings of the International Symposium On Multiple-Valued Logic. 305-310 |
Menon RP, Thornton MA. (2012) Global multiple-valued clock approach for high- performance multi-phase clock integrated circuits Proceedings of the International Symposium On Multiple-Valued Logic. 19-24 |
Feinstein DY, Thornton MA. (2012) Reversible logic synthesis based on decision diagram variable ordering Journal of Multiple-Valued Logic and Soft Computing. 19: 325-339 |
Li L, Thornton MA. (2010) Digital system verification: A combined formal methods and simulation framework Synthesis Lectures On Digital Circuits and Systems. 27: 1-93 |