Duo Li, Ph.D. - Publications
Affiliations: | 2010 | Electrical Engineering | University of California, Riverside, Riverside, CA, United States |
Area:
Electronics and Electrical EngineeringYear | Citation | Score | |||
---|---|---|---|---|---|
2013 | Wang H, Tan SX, Li D, Gupta A, Yuan Y. Composable thermal modeling and simulation for architecture-level thermal designs of multicore microprocessors Acm Transactions On Design Automation of Electronic Systems. 18: 1-27. DOI: 10.1145/2442087.2442099 | 0.637 | |||
2012 | Eguia TJ, Tan SX, Shen R, Li D, Pacheco EH, Tirumala M, Wang L. General Parameterized Thermal Modeling for High-Performance Microprocessor Design Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 20: 211-224. DOI: 10.1109/Tvlsi.2010.2098054 | 0.423 | |||
2010 | Li D, Tan SX, Pacheco EH, Tirumala M. Parameterized architecture-level dynamic thermal models for multicore microprocessors Acm Transactions On Design Automation of Electronic Systems. 15: 1-22. DOI: 10.1145/1698759.1698766 | 0.636 | |||
2010 | Li D, Tan SXD, Mi N, Cai Y. Efficient power grid integrity analysis using on-the-fly error check and reduction Proceedings of the Asia and South Pacific Design Automation Conference, Asp-Dac. 763-768. DOI: 10.1109/ASPDAC.2010.5419788 | 0.5 | |||
2010 | Li D, Tan SX. Statistical analysis of large on-chip power grid networks by variational reduction scheme Integration. 43: 167-175. DOI: 10.1016/J.Vlsi.2010.01.004 | 0.313 | |||
2009 | Li D, Tan SX-, Pacheco EH, Tirumala M. Architecture-Level Thermal Characterization for Multicore Microprocessors Ieee Transactions On Very Large Scale Integration Systems. 17: 1495-1507. DOI: 10.1109/Tvlsi.2008.2005193 | 0.413 | |||
2009 | Li D, Tan SX, Wu L. Hierarchical Krylov subspace based reduction of large interconnects Integration. 42: 193-202. DOI: 10.1016/J.Vlsi.2008.06.004 | 0.341 | |||
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