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N Vijaykrishnan

Affiliations: 
Pennsylvania State University, State College, PA, United States 
Area:
Computer Science
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"N Vijaykrishnan"
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Hendra Saputra grad student 2005 Penn State

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Wang F, Chen Y, Nicopoulos C, et al. (2011) Variation-Aware Task and Communication Mapping for MPSoC Architecture Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 30: 295-307
Mishra AK, Yanamandra A, Das R, et al. (2011) RAFT: A router architecture with frequency tuning for on-chip networks Journal of Parallel and Distributed Computing. 71: 625-640
Hu J, Li F, Degalahal V, et al. (2009) Compiler-assisted soft error detection under performance and energy constraints in embedded systems Acm Transactions in Embedded Computing Systems. 8: 27
Irick KM, Debole M, Park S, et al. (2009) A scalable multi-FPGA framework for real-time digital signal processing Proceedings of Spie - the International Society For Optical Engineering. 7444
Yang S, Wang W, Lu T, et al. (2008) Case Study of Reliability-Aware and Low-Power Design Ieee Transactions On Very Large Scale Integration Systems. 16: 861-873
Tsai YF, Wang F, Xie Y, et al. (2008) Design space exploration for 3-D Cache Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 16: 444-455
Srinivasan S, Li L, Ruggiero M, et al. (2008) Exploring architectural solutions for energy optimisations in bus-based system-on-chip Iet Computers and Digital Techniques. 2: 347-354
Gayasen A, Srinivasan S, Vijaykrishnan N, et al. (2007) Design of power-aware FPGA fabrics International Journal of Embedded Systems. 3: 52-64
Li T, John LK, Sivasubramaniam A, et al. (2007) OS-Aware Branch Prediction: Improving Microprocessor Control Flow Prediction for Operating Systems Ieee Transactions On Computers. 56: 2-17
Hu J, Vijaykrishnan N, Irwin MJ, et al. (2007) Optimising power efficiency in trace cache fetch unit Iet Computers and Digital Techniques. 1: 334-348
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