Year |
Citation |
Score |
2011 |
Cho M, Schlessman J, Wolf W, Mukhopadhyay S. Reconfigurable SRAM Architecture With Spatial Voltage Scaling for Low Power Mobile Multimedia Applications Ieee Transactions On Very Large Scale Integration Systems. 19: 161-165. DOI: 10.1109/Tvlsi.2009.2031468 |
0.354 |
|
2009 |
Fritts JE, Steiling FW, Tucek JA, Wolf W. MediaBench II video: Expediting the next generation of video systems research Microprocessors and Microsystems. 33: 301-318. DOI: 10.1016/J.Micpro.2009.02.010 |
0.713 |
|
2008 |
Yang S, Wang W, Lu T, Wolf W, Vijaykrishnan N, Xie Y. Case Study of Reliability-Aware and Low-Power Design Ieee Transactions On Very Large Scale Integration Systems. 16: 861-873. DOI: 10.1109/Tvlsi.2008.2000460 |
0.589 |
|
2008 |
Wolf W, Jerraya AA, Martin G. Multiprocessor System-on-Chip (MPSoC) Technology Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 27: 1701-1713. DOI: 10.1109/Tcad.2008.923415 |
0.388 |
|
2007 |
Sen M, Corretjer I, Haim F, Saha S, Schlessman J, Lv T, Bhattacharyya SS, Wolf W. Dataflow-based mapping of computer vision algorithms onto FPGAs Eurasip Journal On Embedded Systems. 2007: 29-29. DOI: 10.1155/2007/49236 |
0.409 |
|
2007 |
Lin CH, Xie Y, Wolf W. Code Compression for VLIW Embedded Systems Using a Self-Generating Table Ieee Transactions On Very Large Scale Integration Systems. 15: 1160-1171. DOI: 10.1109/Tvlsi.2007.904097 |
0.601 |
|
2007 |
Xie Y, Wolf W, Lekatsas H. Code Decompression Unit Design for VLIW Embedded Processors Ieee Transactions On Very Large Scale Integration Systems. 15: 975-980. DOI: 10.1109/Tvlsi.2007.900755 |
0.774 |
|
2007 |
Jerraya AA, Franza O, Levy M, Nakaya M, Paulin P, Ramacher U, Talla D, Wolf W. Roundtable: Envisioning the future for multiprocessor SoC Ieee Design and Test of Computers. 24: 174-183. DOI: 10.1109/Mdt.2007.56 |
0.315 |
|
2007 |
Wolf W. Guest Editor's Introduction: The Embedded Systems Landscape Ieee Computer. 40: 29-31. DOI: 10.1109/Mc.2007.350 |
0.349 |
|
2006 |
Xu J, Wolf W, Henkel J, Chakradhar S. A design methodology for application-specific networks-on-chip Acm Transactions in Embedded Computing Systems. 5: 263-280. DOI: 10.1145/1151074.1151076 |
0.384 |
|
2006 |
Xie Y, Wolf W, Lekatsas H. Code compression for embedded VLIW processors using variable-to-fixed coding Ieee Transactions On Very Large Scale Integration Systems. 14: 525-536. DOI: 10.1109/Tvlsi.2006.876105 |
0.769 |
|
2006 |
Lee J, Vijaykrishnan N, Irwin MJ, Wolf W. An efficient architecture for motion estimation and compensation in the transform domain Ieee Transactions On Circuits and Systems For Video Technology. 16: 191-201. DOI: 10.1109/Tcsvt.2005.857780 |
0.325 |
|
2006 |
Wolf W. A Half-Million Strong at Least Ieee Computer. 39: 109-110. DOI: 10.1109/Mc.2006.290 |
0.395 |
|
2005 |
Chabini N, Wolf W. Unification of scheduling, binding, and retiming to reduce power consumption under timings and resources constraints Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 13: 1113-1126. DOI: 10.1109/Tvlsi.2005.859482 |
0.357 |
|
2005 |
Lekatsas H, Henkel J, Wolf W. Approximate arithmetic coding for bus transition reduction in low power designs Ieee Transactions On Very Large Scale Integration Systems. 13: 696-707. DOI: 10.1109/Tvlsi.2005.848803 |
0.773 |
|
2005 |
Lv T, Xu J, Wolf W, Ozer IB, Henkel J, Chakradhar ST. A methodology for architectural design of multimedia multiprocessor SoCs Ieee Design and Test of Computers. 22: 18-26. DOI: 10.1109/Mdt.2005.1 |
0.421 |
|
2005 |
Wolf W. Building the software radio Ieee Computer. 38: 87-89. DOI: 10.1109/Mc.2005.82 |
0.323 |
|
2005 |
Jerraya AA, Wolf W. Hardware/software interface codesign for embedded systems Ieee Computer. 38: 63-69. DOI: 10.1109/Mc.2005.61 |
0.325 |
|
2005 |
Jerraya A, Tenhunen H, Wolf W. Guest Editors' Introduction: Multiprocessor Systems-on-Chips Ieee Computer. 38: 36-40. DOI: 10.1109/Mc.2005.231 |
0.363 |
|
2005 |
Lee C, Wolf W. Implementation-efficient reliability ratio based weighted bit-flipping decoding for LDPC codes Electronics Letters. 41: 755-757. DOI: 10.1049/El:20051060 |
0.693 |
|
2004 |
Chabini N, Wolf W. Reducing dynamic power consumption in synchronous sequential digital designs using retiming and supply voltage scaling Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 12: 573-589. DOI: 10.1109/Tvlsi.2004.827569 |
0.356 |
|
2004 |
Wolf W. Applications and architectures [microprocessor chips] Ieee Computer. 37: 114-116. DOI: 10.1109/Mc.2004.198 |
0.376 |
|
2004 |
Austin T, Blaauw D, Mahlke S, Mudge T, Chakrabarti C, Wolf W. Mobile supercomputers Computer. 37: 81-83. DOI: 10.1109/Mc.2004.1297253 |
0.388 |
|
2003 |
Lv T, Henkel J, Lekatsas H, Wolf W. A dictionary-based en/decoding scheme for low-power data buses Ieee Transactions On Very Large Scale Integration Systems. 11: 943-951. DOI: 10.1109/Tvlsi.2003.817123 |
0.738 |
|
2003 |
Wolf W. A decade of hardware/software codesign Ieee Computer. 36: 38-43. DOI: 10.1109/Mc.2003.1193227 |
0.424 |
|
2003 |
Wolf W. How many system architectures Ieee Computer. 36: 93-95. DOI: 10.1109/Mc.2003.1185227 |
0.394 |
|
2002 |
Wolf W. Whither Warhol's law? [embedded computing] Ieee Computer. 35: 96-97. DOI: 10.1109/Mc.2002.1033036 |
0.315 |
|
2002 |
Wolf W, Ozer B, Lv T. Smart cameras as embedded systems Ieee Computer. 35: 48-53. DOI: 10.1109/Mc.2002.1033027 |
0.399 |
|
2002 |
Wolf W. Household hints for embedded systems designers Ieee Computer. 35: 106-108. DOI: 10.1109/Mc.2002.1009509 |
0.384 |
|
2001 |
Wolf W, Jerraya AA. Guest editors' introduction: application-specific system-ona-chip multiprocessors Ieee Design & Test of Computers. 18: 7-7. DOI: 10.1109/Mdt.2001.953267 |
0.302 |
|
2001 |
Rhodes DL, Wolf W. RAGS - Real-analysis ALAP-guided synthesis Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 20: 931-941. DOI: 10.1109/43.936375 |
0.336 |
|
2000 |
Kozuch M, Wolf W, Wolfe A. An experimental analysis of digital video library servers Multimedia Systems. 8: 135-145. DOI: 10.1007/S005300050156 |
0.332 |
|
1999 |
Potkonjak M, Wolf W. A methodology and algorithms for the design of hard real-time multitasking ASICs Acm Transactions On Design Automation of Electronic Systems (Todaes). 4: 430-459. DOI: 10.1145/323480.323491 |
0.38 |
|
1999 |
Dutta S, Wolf W. A circuit-driven design methodology for video signal-processing datapath elements Ieee Transactions On Very Large Scale Integration Systems. 7: 229-240. DOI: 10.1109/92.766750 |
0.451 |
|
1999 |
Lekatsas H, Wolf W. SAMC: a code compression algorithm for embedded processors Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 18: 1689-1701. DOI: 10.1109/43.811316 |
0.784 |
|
1999 |
Lee C, Potkonjak M, Wolf W. Design Automation For Embedded Systems. 4: 215-242. DOI: 10.1023/A:1008965304567 |
0.308 |
|
1999 |
Yu HH, Wolf W. A hierarchical multiresolution video shot transition detection scheme Computer Vision and Image Understanding. 75: 196-213. DOI: 10.1006/Cviu.1999.0773 |
0.325 |
|
1998 |
Dutta S, O'Connor KJ, Wolf W, Wolfe A. A design study of a 0.25-/spl mu/m video signal processor Ieee Transactions On Circuits and Systems For Video Technology. 8: 501-519. DOI: 10.1109/76.709414 |
0.452 |
|
1998 |
Dutta S, Wolf W, Wolfe A. A methodology to evaluate memory architecture design tradeoffs for video signal processors Ieee Transactions On Circuits and Systems For Video Technology. 8: 36-53. DOI: 10.1109/76.660828 |
0.399 |
|
1998 |
Yen T, Wolf W. Performance estimation for real-time distributed embedded systems Ieee Transactions On Parallel and Distributed Systems. 9: 1125-1136. DOI: 10.1109/71.735959 |
0.348 |
|
1998 |
Philips M, Wolf W. A multi-attribute shot segmentation algorithm for video programs Telecommunication Systems. 9: 393-402. DOI: 10.1023/A:1019164327291 |
0.323 |
|
1996 |
Wolf W. Object-oriented cosynthesis of distributed embedded systems Acm Transactions On Design Automation of Electronic Systems. 1: 301-314. DOI: 10.1145/234860.234861 |
0.331 |
|
1996 |
Yen T, Wolf W. An efficient graph algorithm for FSM scheduling Ieee Transactions On Very Large Scale Integration Systems. 4: 98-112. DOI: 10.1109/92.486084 |
0.365 |
|
1996 |
Dutta S, Wolf W. A flexible parallel architecture adapted to block-matching motion-estimation algorithms Ieee Transactions On Circuits and Systems For Video Technology. 6: 74-86. DOI: 10.1109/76.486422 |
0.402 |
|
1996 |
Wolf W, Wolfe A, Chinatti S, Koshy R, Slater G, Sun S. Lessons from the design of a PC-based private branch exchange Design Automation For Embedded Systems. 1: 297-313. DOI: 10.1007/Bf00209907 |
0.391 |
|
1995 |
Dutta S, Wolf W. Asymptotic limits of video signal processing architectures Ieee Transactions On Circuits and Systems For Video Technology. 5: 545-561. DOI: 10.1109/76.475897 |
0.355 |
|
1994 |
Woo NS, Dunlop AE, Wolf W. Codesign from cospecification Ieee Computer. 27: 42-47. DOI: 10.1109/2.248879 |
0.355 |
|
1993 |
Wolf W. FSM decomposition for pipelined data Integration. 15: 117-131. DOI: 10.1016/0167-9260(93)90048-H |
0.33 |
|
1992 |
Wolf W. Synthesis tools help teach systems concepts in VLSI design Ieee Transactions On Education. 35: 11-17. DOI: 10.1109/13.123412 |
0.345 |
|
1992 |
Wolf W. Object-oriented implementation issues in an experimental CAD system Software - Practice and Experience. 22: 287-304. DOI: 10.1002/Spe.4380220402 |
0.318 |
|
1991 |
Bower W, Seaquist C, Wolf W. A framework for industrial layout generators Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 10: 596-603. DOI: 10.1109/43.79497 |
0.336 |
|
1991 |
Wolf W. Redcoding-derived bounds for input encoding Computers & Electrical Engineering. 16: 193-201. DOI: 10.1016/0045-7906(90)90011-4 |
0.328 |
|
1989 |
Wolf W, Keutzer K, Akella J. Addendum to 'A kernel-finding state assignment algorithm for multi-level logic' Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 8: 925-927. DOI: 10.1109/43.31552 |
0.341 |
|
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