Kevin Skadron
Affiliations: | University of Virginia, Charlottesville, VA |
Area:
Computer ScienceGoogle:
"Kevin Skadron"Parents
Sign in to add mentor| Douglas Clark | grad student | 1999 | Princeton | |
| (Characterizing and Removing Branch Misdirections.) | ||||
Children
Sign in to add trainee| John W. Haskins | grad student | 2003 | UVA |
| Michele Co | grad student | 2006 | UVA |
| Yingmin Li | grad student | 2006 | UVA |
| Tibor Horvath | grad student | 2008 | UVA |
| Karthik Sankaranarayanan | grad student | 2009 | UVA |
| David Tarjan | grad student | 2009 | UVA |
| Jiayuan Meng | grad student | 2010 | UVA |
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Publications
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| Wang K, Sadredini E, Skadron K. (2016) Sequential pattern mining with the micron automata processor 2016 Acm International Conference On Computing Frontiers - Proceedings. 135-144 |
| Cheng E, Mirkhani S, Szafaryn LG, et al. (2016) CLEAR: Crosslayer exploration for architecting resilience combining hardware and software techniques to tolerate soft errors in processor cores Proceedings - Design Automation Conference. 5 |
| Angstadt K, Weimer W, Skadron K. (2016) RAPID programming of pattern-recognition processors International Conference On Architectural Support For Programming Languages and Operating Systems - Asplos. 2: 593-605 |
| Falsafi B, Stan M, Skadron K, et al. (2016) Near-Memory Data Services Ieee Micro. 36: 6-7 |
| Nickolls J, Buck I, Garland M, et al. (2016) Scalable parallel programming 2008 Ieee Hot Chips 20 Symposium, Hcs 2008 |
| El-Hadedy M, Skadron K. (2015) Hardware overhead analysis of programmability in ARX crypto processing Acm International Conference Proceeding Series. 14 |
| Zhang R, Mazumdar K, Meyer BH, et al. (2015) A cross-layer design exploration of charge-recycled power-delivery in many-layer 3D-IC Proceedings - Design Automation Conference. 2015 |
| Mozafari SH, Skadron K, Meyer BH. (2015) Yield-aware performance-cost characterization for multi-core SIMT Proceedings of the Acm Great Lakes Symposium On Vlsi, Glsvlsi. 20: 237-240 |
| Faust GG, Zhang R, Skadron K, et al. (2015) ArchFP: Rapid prototyping of pre-RTL floorplans Ieee/Ifip International Conference On Vlsi and System-On-Chip, Vlsi-Soc. 7: 183-188 |
| Zhang R, Meyer BH, Wang K, et al. (2015) Tolerating the Consequences of Multiple EM-Induced C4 Bump Failures Ieee Transactions On Very Large Scale Integration (Vlsi) Systems |