Janak H. Patel
Affiliations: | University of Illinois, Urbana-Champaign, Urbana-Champaign, IL |
Area:
Electronics and Electrical Engineering, Computer ScienceGoogle:
"Janak Patel"Parents
Sign in to add mentorEdward Steinberg Davidson | grad student | 1976 | Stanford (E-Tree) | |
(Improving the Throughput of Pipelines with Delays and Buffers) |
Children
Sign in to add traineeAlok Choudhary | grad student | 1989 | UIUC (E-Tree) |
Kaushik Roy | grad student | 1990 | UIUC (E-Tree) |
Liyang Lai | grad student | 2005 | UIUC |
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Publications
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Lai L, Rinderknecht T, Cheng WT, et al. (2004) Logic BIST using constrained scan cells Proceedings of the Ieee Vlsi Test Symposium. 199-205 |
Hartanto I, Venkataraman S, Fuchs WK, et al. (2001) Diagnostic simulation of stuck-at faults in sequential circuits using compact lists Acm Transactions On Design Automation of Electronic Systems. 6: 471-489 |
Hsu FF, Butler KM, Patel JH. (2001) A case study on the implementation of the Illinois Scan Architecture Ieee International Test Conference (Tc). 538-547 |
Sharma M, Patel JH. (2001) Testing of critical paths for delay faults Ieee International Test Conference (Tc). 634-641 |
Hsiao MS, Rudnick EM, Patel JH. (2000) Dynamic state traversal for sequential circuit test generation Acm Transactions On Design Automation of Electronic Systems. 5: 548-565 |
Rudnick EM, Patel JH. (1999) Efficient techniques for dynamic test sequence compaction Ieee Transactions On Computers. 48: 323-330 |
Hsiao MS, Rudnick EM, Patel JH. (1999) Fast static compaction algorithms for sequential circuit test vectors Ieee Transactions On Computers. 48: 311-322 |
Hamzaoglu I, Patel JH. (1999) New techniques for deterministic test pattern generation Journal of Electronic Testing: Theory and Applications (Jetta). 15: 63-73 |
Hsiao MS, Rudnick EM, Patel JH. (1998) Application of genetically engineered finite-statemachine sequences to sequential circuit ATPG Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 17: 239-254 |
Hsu FF, Patel JH. (1998) High-Level Controllability and Observability Analysis for Test Synthesis Journal of Electronic Testing: Theory and Applications (Jetta). 13: 93-103 |