Year |
Citation |
Score |
2020 |
Xue J, Vijaykumar TN, Thottethodi M. Network Interface Architecture for Remote Indirect Memory Access (RIMA) in Datacenters Acm Transactions On Architecture and Code Optimization. 17: 1-22. DOI: 10.1145/3374215 |
0.334 |
|
2020 |
Xue J, Chaudhry MU, Vamanan B, Vijaykumar TN, Thottethodi M. Dart: Divide and Specialize for Fast Response to Congestion in RDMA-Based Datacenter Networks Ieee/Acm Transactions On Networking. 28: 322-335. DOI: 10.1109/Tnet.2019.2961671 |
0.352 |
|
2019 |
Mahmood T, Narayanan SP, Rao S, Vijaykumar TN, Thottethodi M. Karma: Cost-effective Geo-replicated Cloud Storage with Dynamic Enforcement of Causal Consistency Ieee Transactions On Cloud Computing. 1-1. DOI: 10.1109/Tcc.2018.2842184 |
0.311 |
|
2015 |
Vamanan B, Sohail HB, Hasan J, Vijaykumar TN. TimeTrader: Exploiting latency tail to save datacenter energy for online search Proceedings of the Annual International Symposium On Microarchitecture, Micro. 5: 585-597. DOI: 10.1145/2830772.2830779 |
0.502 |
|
2014 |
Voskuilen G, Vijaykumar TN. High-performance fractal coherence International Conference On Architectural Support For Programming Languages and Operating Systems - Asplos. 701-714. DOI: 10.1145/2541940.2541982 |
0.773 |
|
2014 |
Voskuilen G, Vijaykumar TN. Fractal++: Closing the performance gap between fractal and conventional coherence Proceedings - International Symposium On Computer Architecture. 409-420. DOI: 10.1109/ISCA.2014.6853211 |
0.771 |
|
2013 |
Amin AM, Thakur R, Madren S, Chuang HS, Thottethodi M, Vijaykumar TN, Wereley ST, Jacobson SC. Software-programmable continuous-flow multi-purpose lab-on-a-chip. Microfluidics and Nanofluidics. 15: 647-659. PMID 24436691 DOI: 10.1007/S10404-013-1180-2 |
0.596 |
|
2013 |
Jafri SAR, Voskuilen G, Vijaykumar TN. Wait-n-GoTM: Improving HTM performance by serializing cyclic dependencies Acm Sigplan Notices. 48: 521-534. DOI: 10.1145/2499368.2451173 |
0.761 |
|
2013 |
Ahmad F, Lee S, Thottethodi M, Vijaykumar TN. MapReduce with communication overlap (MaRCO) Journal of Parallel and Distributed Computing. 73: 608-620. DOI: 10.1016/J.Jpdc.2012.12.012 |
0.531 |
|
2012 |
Vamanan B, Hasan J, Vijaykumar TN. Deadline-aware datacenter TCP (D2TCP) Computer Communication Review. 42: 115-126. DOI: 10.1145/2377677.2377709 |
0.525 |
|
2012 |
Vamanan B, Hasan J, Vijaykumar TN. Deadline-aware datacenter TCP (D 2TCP) Sigcomm'12 - Proceedings of the Acm Sigcomm 2012 Conference Applications, Technologies, Architectures, and Protocols For Computer Communication. 115-126. DOI: 10.1145/2342356.2342388 |
0.474 |
|
2012 |
Faraboschi P, Vijaykumar TN. Top picks from the 2011 computer architecture conferences Ieee Micro. 32: 3-6. DOI: 10.1109/Mm.2012.46 |
0.34 |
|
2011 |
Vamanan B, Vijaykumar TN. TreeCAM: Decoupling updates and lookups in packet classification Proceedings of the 7th Conference On Emerging Networking Experiments and Technologies, Conext'11. DOI: 10.1145/2079296.2079323 |
0.317 |
|
2010 |
Vamanan B, Voskuilen G, Vijaykumar TN. EffiCuts: Optimizing packet classification for memory and throughput Computer Communication Review. 40: 207-218. DOI: 10.1145/1851275.1851208 |
0.746 |
|
2010 |
Voskuilen G, Ahmad F, Vijaykumar TN. Timetraveler: Exploiting acyclic races for optimizing memory race recording Proceedings - International Symposium On Computer Architecture. 198-209. DOI: 10.1145/1815961.1815986 |
0.765 |
|
2010 |
Jafri SAR, Thottethodi M, Vijaykumar TN. LiteTM: Reducing transactional state overhead Proceedings - International Symposium On High-Performance Computer Architecture. |
0.324 |
|
2008 |
Chishti Z, Vijaykumar TN. Optimal power/performance pipeline depth for SMT in scaled technologies Ieee Transactions On Computers. 57: 69-81. DOI: 10.1109/Tc.2007.70771 |
0.726 |
|
2008 |
Amin AM, Thottethodi M, Vijaykumar TN, Wereley S, Jacobson SC. Automatic volume management for programmable microfluidics Acm Sigplan Notices. 43: 56-67. |
0.552 |
|
2007 |
Powell MD, Vijaykumar TN. Resource area dilation to reduce power density in throughput servers Proceedings of the International Symposium On Low Power Electronics and Design. 268-273. DOI: 10.1145/1283780.1283838 |
0.556 |
|
2007 |
Amin AM, Thottethodi M, Vijaykumar TN, Wereley S, Jacobson SC. Aquacore: A programmable architecture for microfluidics Proceedings - International Symposium On Computer Architecture. 254-265. DOI: 10.1145/1250662.1250694 |
0.551 |
|
2007 |
Johnson TA, Eigenmann R, Vijaykumar TN. Speculative thread decomposition through empirical optimization Proceedings of the Acm Sigplan Symposium On Principles and Practice of Parallel Programming, Ppopp. 205-214. DOI: 10.1145/1229428.1229474 |
0.329 |
|
2007 |
Schuchman E, Vijaykumar TN. BlackJack: Hard error detection with redundant threads on SMT Proceedings of the International Conference On Dependable Systems and Networks. 327-336. DOI: 10.1109/DSN.2007.23 |
0.482 |
|
2006 |
Schuchman E, Vijaykumar TN. A program transformation and architecture support for quantum uncomputation International Conference On Architectural Support For Programming Languages and Operating Systems - Asplos. 252-263. DOI: 10.1145/1168857.1168889 |
0.485 |
|
2006 |
Kim SW, Ooi CL, Eigenmann R, Falsafi B, Vijaykumar TN. Exploiting reference idempotency to reduce speculative storage overflow Acm Transactions On Programming Languages and Systems. 28: 942-965. DOI: 10.1145/1152649.1152653 |
0.424 |
|
2006 |
Özdoganoglu H, Vijaykumar TN, Brodley CE, Kuperman BA, Jalote A. SmashGuard: A hardware solution to prevent security attacks on the function return Address Ieee Transactions On Computers. 55: 1271-1285. DOI: 10.1109/Tc.2006.166 |
0.388 |
|
2006 |
Gomaa MA, Vijaykumar TN. Opportunistic transient-fault detection Ieee Micro. 26: 92-99. DOI: 10.1109/Mm.2006.20 |
0.346 |
|
2006 |
Cher CY, Park I, Vijaykumar TN. Do trace cache, value prediction and prefetching improve SMT throughput? Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 3894: 232-251. DOI: 10.1007/11682127_17 |
0.641 |
|
2005 |
Hasan J, Vijaykumar TN. Dynamic pipelining: Making IP-lookup truly scalable Computer Communication Review. 35: 205-216. DOI: 10.1145/1090191.1080116 |
0.507 |
|
2005 |
Li H, Cher CY, Roy K, Vijaykumar TN. Combined circuit and architectural level variable supply-voltage scaling for low power Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 13: 564-575. DOI: 10.1109/Tvlsi.2005.844295 |
0.706 |
|
2005 |
Powell MD, Schuchman E, Vijaykumar TN. Balancing resource utilization to mitigate power density in processor pipelines Proceedings of the Annual International Symposium On Microarchitecture, Micro. 294-304. DOI: 10.1109/MICRO.2005.14 |
0.662 |
|
2005 |
Schuchman E, Vijaykumar TN. Rescue: A microarchitecture for testability and defect tolerance Proceedings - International Symposium On Computer Architecture. 160-171. DOI: 10.1109/ISCA.2005.44 |
0.528 |
|
2005 |
Hasan J, Jalote A, Vijaykumar TN, Brodley CE. Heat stroke: Power-density-based denial of service in SMT Proceedings - International Symposium On High-Performance Computer Architecture. 166-177. DOI: 10.1109/HPCA.2005.16 |
0.489 |
|
2005 |
Chishti Z, Powell MD, Vijaykumar TN. Optimizing replication, communication, and capacity allocation in CMPs Proceedings - International Symposium On Computer Architecture. 357-368. |
0.572 |
|
2004 |
Powell MD, Gomaa M, Vijaykumar TN. Heat-and-run: Leveraging SMT and CMP to manage power density through the operating system Operating Systems Review (Acm). 38: 260-270. DOI: 10.1145/1037949.1024424 |
0.531 |
|
2004 |
Cher CY, Hosking AL, Vijaykumar TN. Software prefetching for mark-sweep garbage collection: Hardware analysis and software redesign Acm Sigplan Notices. 39: 199-210. DOI: 10.1145/1037949.1024417 |
0.678 |
|
2004 |
Li H, Bhunia S, Chen Y, Roy K, Vijaykumar TN. DCG: Deterministic Clock-Gating for Low-Power Microprocessor Design Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 12: 245-254. DOI: 10.1109/TVLSI.2004.824307 |
0.309 |
|
2004 |
Powell MD, Vijaykumar TN. Exploiting resonant behavior to reduce inductive noise Conference Proceedings - Annual International Symposium On Computer Architecture, Isca. 31: 288-299. |
0.468 |
|
2003 |
Chishti Z, Powell MD, Vijaykumar TN. Distance associativity for high-performance energy-efficient non-uniform cache architectures Proceedings of the Annual International Symposium On Microarchitecture, Micro. 2003: 55-66. DOI: 10.1109/MICRO.2003.1253183 |
0.576 |
|
2003 |
Li H, Cher CY, Vijaykumar TN, Roy K. VSV: L2-miss-driven variable supply-voltage scaling for low power Proceedings of the Annual International Symposium On Microarchitecture, Micro. 2003: 19-28. DOI: 10.1109/MICRO.2003.1253180 |
0.686 |
|
2003 |
Li H, Bhunia S, Chen Y, Vijaykumar TN, Roy K. Deterministic clock gating for microprocessor power reduction Proceedings - International Symposium On High-Performance Computer Architecture. 12: 113-122. DOI: 10.1109/HPCA.2003.1183529 |
0.348 |
|
2003 |
Agarwal A, Roy K, Vijaykumar TN. Exploring high bandwidth pipelined cache architecture for scaled technology Proceedings -Design, Automation and Test in Europe, Date. 778-783. DOI: 10.1109/DATE.2003.1253701 |
0.344 |
|
2003 |
Hasan J, Chandra S, Vijaykumar TN. Efficient use of memory bandwidth to improve network processor throughput Conference Proceedings - Annual International Symposium On Computer Architecture, Isca. 300-311. |
0.56 |
|
2003 |
Park I, Falsafi B, Vijaykumar TN. Implicitly-multithreaded processors Conference Proceedings - Annual International Symposium On Computer Architecture, Isca. 39-50. |
0.352 |
|
2003 |
Powell MD, Vijaykumar TN. Pipeline Muffling and A Priori Current Ramping: Architectural Techniques to Reduce High-Frequency Inductive Noise Proceedings of the International Symposium On Low Power Electronics and Design. 223-228. |
0.521 |
|
2003 |
Powell MD, Vijaykumar TN. Pipeline damping: A microarchitectural technique to reduce inductive noise in supply voltage Conference Proceedings - Annual International Symposium On Computer Architecture, Isca. 72-83. |
0.506 |
|
2002 |
Park I, Powell MD, Vijaykumar TN. Reducing register ports for higher speed and lower energy Proceedings of the Annual International Symposium On Microarchitecture, Micro. 2002: 171-182. DOI: 10.1109/MICRO.2002.1176248 |
0.564 |
|
2001 |
Powell M, Yang SH, Falsafi B, Roy K, Vijaykumar TN. Reducing leakage in a high-performance deep-submicron instruction cache Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 9: 77-89. DOI: 10.1109/92.920821 |
0.544 |
|
2001 |
Kim SW, Ooi CL, Eigenmann R, Falsafi B, Vijaykumar TN. Reference idempotency analysis: A framework for optimizing speculative execution Sigplan Notices (Acm Special Interest Group On Programming Languages). 36: 2-11. |
0.318 |
|
2001 |
Ooi CL, Seon Wook Kim, Park I, Eigenmann R, Falsafi B, Vijaykumar TN. Multiplex: Unifying conventional and speculative thread-level parallelism on a chip multiprocessor Proceedings of the International Conference On Supercomputing. 368-380. |
0.344 |
|
2001 |
Cher CY, Vijaykumar TN. Skipper: A microarchitecture for exploiting control-flow independence Proceedings of the Annual International Symposium On Microarchitecture. 4-15. |
0.649 |
|
1999 |
Vijaykumar TN, Sohi GS. Task Selection for the Multiscalar Architecture Journal of Parallel and Distributed Computing. 58: 132-158. DOI: 10.1006/Jpdc.1999.1557 |
0.622 |
|
1998 |
Gopal S, Vijaykumar TN, Smith JE, Sohi GS. Speculative versioning cache Ieee High-Performance Computer Architecture Symposium Proceedings. 195-205. DOI: 10.1109/71.970565 |
0.665 |
|
Show low-probability matches. |