Patrick H. Madden - Publications

Affiliations: 
State University of New York at Binghamton, Vestal, NY, United States 
Area:
Computer Science

21 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2010 Agnihotri AR, Ono S, Madden PH. An effective approach for large scale floorplanning Proceedings of the Acm Great Lakes Symposium On Vlsi, Glsvlsi. 107-110. DOI: 10.1145/1785481.1785507  0.716
2007 Li C, Xie M, Koh CK, Cong J, Madden PH. Routability-driven placement and white space allocation Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 26: 858-871. DOI: 10.1109/Tcad.2006.884575  0.668
2007 Agnihotri AR, Madden PH. Fast analytic placement using minimum cost flow Proceedings of the Asia and South Pacific Design Automation Conference, Asp-Dac. 128-134. DOI: 10.1109/ASPDAC.2007.357974  0.769
2007 Agnihotri AR, Ono S, Madden PH. Placement for power optimization Closing the Power Gap Between Asic and Custom: Tools and Techniques For Low Power Design. 219-249. DOI: 10.1007/978-0-387-68953-1_9  0.734
2005 Agnihotri AR, Ono S, Li C, Yildiz MC, Khatkhate A, Koh CK, Madden PH. Mixed block placement via fractional cut recursive bisection Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 24: 748-760. DOI: 10.1109/Tcad.2005.846363  0.718
2005 Agarwal P, Vidyarthi A, Madden PH. Performance analysis by topology indexed lookup tables Proceedings - Ieee International Symposium On Circuits and Systems. 3579-3582. DOI: 10.1109/ISCAS.2005.1465403  0.301
2005 Agnihotri AR, Ono S, Madden PH. Recursive bisection placement: Feng shui 5.0 implementation details Proceedings of the International Symposium On Physical Design. 230-232.  0.732
2005 Ramachandaran P, Agnihotri AR, Ono S, Damodaran P, Srihari K, Madden PH. Optimal placement by branch-and-price Proceedings of the Asia and South Pacific Design Automation Conference, Asp-Dac. 1: 337-342.  0.721
2004 Adya SN, Yildiz MC, Markov IL, Villarrubia PG, Parakh PN, Madden PH. Benchmarking for Large-Scale Placement and Beyond Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 23: 472-487. DOI: 10.1109/Tcad.2004.825852  0.616
2004 Khatkhate A, Li C, Agnihotri AR, Yildiz MC, Ono S, Koh CK, Madden PH. Recursive bisection based mixed block placement Proceedings of the International Symposium On Physical Design. 84-89.  0.723
2003 Agnihotri AR, Madden PH. Congestion reduction in traditional and new routing architectures Proceedings of the Ieee Great Lakes Symposium On Vlsi. 211-214.  0.723
2003 Agnihotri A, Yildiz MC, Khatkhate A, Mathur A, Ono S, Madden PH. Fractional cut: Improved recursive bisection placement Ieee/Acm International Conference On Computer-Aided Design, Digest of Technical Papers. 307-310.  0.492
2002 Madden PH. Reporting of standard cell placement results Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 21: 240-247. DOI: 10.1109/43.980262  0.406
2001 Yildiz MC, Madden PH. Preferred direction Steiner trees Proceedings of the Ieee Great Lakes Symposium On Vlsi. 56-61. DOI: 10.1109/Tcad.2002.804105  0.585
2001 Yildiz MC, Madden PH. Preferred direction Steiner trees Proceedings of the Ieee Great Lakes Symposium On Vlsi. 56-61. DOI: 10.1109/TCAD.2002.804105  0.545
2001 Cong J, Koh CK, Madden PH. Interconnect layout optimization under higher order RLC model for MCM designs Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 20: 1455-1463. DOI: 10.1109/43.969438  0.707
2001 Yildiz MC, Madden PH. Improved cut sequences for partitioning based placement Proceedings - Design Automation Conference. 776-779.  0.512
2001 Yildiz MC, Madden PH. Global objectives for standard cell placement Proceedings of the Ieee Great Lakes Symposium On Vlsi. 68-72.  0.578
1997 Cong J, Madden PH. Performance-driven routing with multiple sources Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 16: 410-419. DOI: 10.1109/43.602477  0.566
1996 Cong J, He L, Koh C, Madden PH. Performance optimization of VLSI interconnect layout Integration. 21: 1-94. DOI: 10.1016/S0167-9260(96)00008-9  0.733
1996 Cong J, He L, Koh CK, Madden PH. Performance optimization of VLSI interconnect layout Integration, the Vlsi Journal. 21: 1-94.  0.376
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