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Leyla Nazhandali, Ph.D. - Publications

Affiliations: 
2006 University of Michigan, Ann Arbor, Ann Arbor, MI 
Area:
Electronics and Electrical Engineering, Computer Science
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32 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2019 Yuce B, Deshpande C, Ghodrati M, Bendre A, Nazhandali L, Schaumont P. A Secure Exception Mode for Fault-Attack-Resistant Processing Ieee Transactions On Dependable and Secure Computing. 16: 388-401. DOI: 10.1109/Tdsc.2018.2823767  0.308
2015 Srivastav M, Ehteshamuddin M, Stegner K, Nazhandali L. Design of ultra-low power scalable-throughput many-core DSP applications Acm Transactions On Design Automation of Electronic Systems. 20. DOI: 10.1145/2720018  0.543
2015 Srivastav M, Nazhandali L. Study of the impact of aging on many-core energy-efficient DSP systems Proceedings - International Symposium On Quality Electronic Design, Isqed. 2015: 66-70. DOI: 10.1109/ISQED.2015.7085400  0.4
2014 Khatir M, Nazhandali L. Sense amplifier pass transistor logic for energy efficient and DPA-resistant AES circuit Proceedings - International Symposium On Quality Electronic Design, Isqed. 517-522. DOI: 10.1109/ISQED.2014.6783370  0.431
2014 Ganta D, Nazhandali L. Circuit-level approach to improve the temperature reliability of Bi-stable PUFs Proceedings - International Symposium On Quality Electronic Design, Isqed. 467-472. DOI: 10.1109/ISQED.2014.6783361  0.326
2013 Desai AR, Hsiao MS, Wang C, Nazhandali L, Hall S. Interlocking obfuscation for anti-tamper hardware Acm International Conference Proceeding Series. DOI: 10.1145/2459976.2459985  0.312
2013 Rafeei L, Henry MB, Nazhandali L. Fast approximation framework for timing and power analysis of ultra-low-voltage circuits Ieee Transactions On Circuits and Systems I: Regular Papers. 60: 1501-1510. DOI: 10.1109/TCSI.2012.2226506  0.446
2013 Henry MB, Nazhandali L. NEMS-based functional unit power-gating: Design, analysis, and optimization Ieee Transactions On Circuits and Systems I: Regular Papers. 60: 290-302. DOI: 10.1109/Tcsi.2012.2215785  0.468
2013 Bhunia S, Agrawal D, Nazhandali L. Guest editors' introduction: Trusted system-on-chip with untrusted components Ieee Design and Test. 30: 5-7. DOI: 10.1109/Mdat.2013.2258093  0.331
2013 Srivastav M, Guo X, Huang S, Ganta D, Henry MB, Nazhandali L, Schaumont P. Design and benchmarking of an ASIC with five SHA-3 finalist candidates Microprocessors and Microsystems. 37: 246-257. DOI: 10.1016/J.Micpro.2012.09.001  0.431
2012 Srivastav M, Henry MB, Nazhandali L. Design of energy-efficient, adaptable throughput systems at near/sub-threshold voltage Acm Transactions On Design Automation of Electronic Systems. 18. DOI: 10.1145/2390191.2390194  0.562
2012 Henry MB, Nazhandali L. From transistors to NEMS: Highly efficient power-gating of CMOS circuits Acm Journal On Emerging Technologies in Computing Systems. 8. DOI: 10.1145/2093145.2093147  0.458
2012 Srivastav M, Henry MB, Nazhandali L. Design of low-power, scalable-throughput systems at near/sub threshold voltage Proceedings - International Symposium On Quality Electronic Design, Isqed. 609-616. DOI: 10.1109/ISQED.2012.6187556  0.506
2012 Srivastav M, Nazhandali L. Design and analysis of multi-core homogeneous systems for energy harvesting applications 2012 19th Ieee International Conference On Electronics, Circuits, and Systems, Icecs 2012. 532-535. DOI: 10.1109/ICECS.2012.6463691  0.466
2012 Henry MB, Nazhandali L. Design techniques for functional-unit power gating in the ultra-low-voltage region Proceedings of the Asia and South Pacific Design Automation Conference, Asp-Dac. 609-614. DOI: 10.1109/ASPDAC.2012.6165029  0.463
2011 Ganta D, Vivekraja V, Priya K, Nazhandali L. A highly stable leakage-based silicon physical unclonable functions Proceedings of the Ieee International Conference On Vlsi Design. 135-140. DOI: 10.1109/VLSID.2011.72  0.378
2011 Henry MB, Lyerly R, Nazhandali L, Fruehling A, Peroulis D. MEMS-based power gating for highly scalable periodic and event-driven processing Proceedings of the Ieee International Conference On Vlsi Design. 286-291. DOI: 10.1109/VLSID.2011.66  0.4
2011 Vivekraja V, Nazhandali L. Feedback based supply voltage control for temperature variation tolerant PUFs Proceedings of the Ieee International Conference On Vlsi Design. 214-219. DOI: 10.1109/VLSID.2011.60  0.332
2011 Henry MB, Nazhandali L. Hybrid super/subthreshold design of a low power scalable-throughput fft architecture Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 6760: 175-194. DOI: 10.1007/978-3-642-24568-8-9  0.411
2011 Henry M, Srivastav M, Nazhandali L. A case for NEMS-based functional-unit power gating of low-power embedded microprocessors Proceedings - Design Automation Conference. 872-877.  0.369
2010 Henry MB, Nazhandali L. From transistors to MEMS: Throughput-aware power gating in CMOS circuits Proceedings -Design, Automation and Test in Europe, Date. 130-135.  0.402
2009 Zhai B, Pant S, Nazhandali L, Hanson S, Olson J, Reeves A, Minuth M, Helfand R, Austin T, Sylvester D, Blaauw D. Energy-efficient subthreshold processor design Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 17: 1127-1137. DOI: 10.1109/Tvlsi.2008.2007564  0.547
2009 Henry MB, Griffin SB, Nazhandali L. Fast simulation framework for subthreshold circuits Proceedings - Ieee International Symposium On Circuits and Systems. 2549-2552. DOI: 10.1109/ISCAS.2009.5118321  0.438
2009 Vivekraja V, Nazhandali L. Circuit-Level Techniques for Reliable Physically Uncloneable Functions 2009 Ieee International Workshop On Hardware-Oriented Security and Trust, Host 2009. 30-35. DOI: 10.1109/HST.2009.5225054  0.371
2008 Henry MB, Haider SI, Nazhandali L. A low-power parallel design of discrete wavelet transform using subthreshold voltage technology Embedded Systems Week 2008 - Proceedings of the 2008 International Conference On Compilers, Architecture and Synthesis For Embedded Systems, Cases'08. 235-244. DOI: 10.1145/1450095.1450130  0.448
2008 Hanson S, Zhai B, Seok M, Cline B, Zhou K, Singhal M, Minuth M, Olson J, Nazhandali L, Austin T, Sylvester D, Blaauw D. Exploring variability and performance in a sub-200-mV processor Ieee Journal of Solid-State Circuits. 43: 881-890. DOI: 10.1109/Jssc.2008.917505  0.539
2008 Haider SI, Nazhandali L. Utilizing sub-threshold technology for the creation of secure circuits Proceedings - Ieee International Symposium On Circuits and Systems. 3182-3185. DOI: 10.1109/ISCAS.2008.4542134  0.413
2007 Hanson S, Zhai B, Seok M, Cline B, Zhou K, Singhal M, Minuth M, Olson J, Nazhandali L, Austin T, Sylvester D, Blaauw D. Performance and variability optimization strategies in a sub-200mV, 3.5pJ/inst, 11nW subthreshold processor Ieee Symposium On Vlsi Circuits, Digest of Technical Papers. 152-153. DOI: 10.1109/VLSIC.2007.4342694  0.358
2006 Zhai B, Nazhandali L, Olson J, Reeves A, Minuth M, Helfand R, Pant S, Blaauw D, Austin T. A 2.60pJ/inst subthreshold sensor processor for optimal energy efficiency Ieee Symposium On Vlsi Circuits, Digest of Technical Papers. 154-155.  0.487
2005 Nazhandali L, Zhai B, Olson J, Reeves A, Minuth M, Helfand R, Pant S, Austin T, Blaauw D. Energy optimization of subthreshold-voltage sensor network processors Proceedings - International Symposium On Computer Architecture. 197-207. DOI: 10.1109/ISCA.2005.26  0.421
2005 Nazhandali L, Minuth M, Austin T. SenseBench: Toward an accurate evaluation of sensor network processors Proceedings of the 2005 Ieee International Symposium On Workload Characterization, Iiswc-2005. 2005: 197-203. DOI: 10.1109/IISWC.2005.1526017  0.306
2005 Nazhandali L, Minuth M, Zhai B, Olson J, Austin T, Blaauw D. A second-generation sensor network processor with application-driven memory optimizations and out-of-order execution Cases 2005: International Conference On Compilers, Architecture, and Synthesis For Embedded Systems. 249-256.  0.444
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