| Year |
Citation |
Score |
| 2003 |
Gupta A, Denton J, McNally H, Bashir R. Novel fabrication method for surface micromachined thin single-crystal silicon cantilever beams Journal of Microelectromechanical Systems. 12: 185-192. DOI: 10.1109/Jmems.2003.809974 |
0.366 |
|
| 2003 |
Elibol OH, Morisette D, Akin D, Denton JP, Bashir R. Integrated nanoscale silicon sensors using top-down fabrication Applied Physics Letters. 83: 4613-4615. DOI: 10.1063/1.1630853 |
0.435 |
|
| 2003 |
Yang J, Denton J, Neudeck G. Ammonia nitrided isolation oxide for selective epitaxial growth technology to eliminate edge transistor effects of SOI and bulk N-channel MOSFETs Electronics Letters. 39: 1013. DOI: 10.1049/El:20030642 |
0.482 |
|
| 2002 |
Yang J, Neudeck GW, Denton JP. Electrical effects of a single stacking fault on fully depleted thin-film silicon-on-insulator P-channel metal–oxide–semiconductor field-effect transistors Journal of Applied Physics. 91: 420. DOI: 10.1063/1.1417995 |
0.393 |
|
| 2001 |
Bourland S, Denton J, Ikram A, Neudeck GW, Bashir R. Silicon-on-insulator processes for the fabrication of novel nanostructures Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures. 19: 1995. DOI: 10.1116/1.1404980 |
0.566 |
|
| 2001 |
Ahmed SS, Denton JP, Neudeck GW. Nitrided thermal SiO[sub 2] for use as top and bottom gate insulators in self-aligned double gate silicon-on-insulator metal–oxide–semiconductor field effect transistor Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures. 19: 800. DOI: 10.1116/1.1364698 |
0.475 |
|
| 2001 |
Yang J, Denton JP, Neudeck GW. Edge transistor elimination in oxide trench isolated N-channel metal–oxide–semiconductor field effect transistors Journal of Vacuum Science & Technology B. 19: 327-332. DOI: 10.1116/1.1358854 |
0.461 |
|
| 2000 |
Bashir R, Su T, Sherman JM, Neudeck GW, Denton J, Obeidat A. Reduction of sidewall defect induced leakage currents by the use of nitrided field oxides in silicon selective epitaxial growth isolation for advanced ultralarge scale integration Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures. 18: 695-699. DOI: 10.1116/1.591261 |
0.512 |
|
| 1999 |
Neudeck GW, Pae S, Denton JP, Su T. Multiple layers of silicon-on-insulator for nanostructure devices Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures. 17: 994. DOI: 10.1116/1.590682 |
0.526 |
|
| 1999 |
Pae S, Su T, Denton JP, Neudeck GW. Multiple layers of silicon-on-insulator islands fabrication by selective epitaxial growth Ieee Electron Device Letters. 20: 194-196. DOI: 10.1109/55.761012 |
0.511 |
|
| 1997 |
Lee IM, Wang WC, Koh MTK, Denton JP, Kvam EP, Neudeck GW, Takoudis CG. Selective epitaxial growth of strained silicon-germanium films in tubular hot-wall low pressure chemical vapor deposition systems Materials Research Society Symposium - Proceedings. 448: 265-270. DOI: 10.1557/Proc-448-265 |
0.444 |
|
| 1996 |
Neudeck GW, Spitz J, Chang JC, Denton JP, Gallagher N. Precision crystal corner cube arrays for optical gratings formed by (100) silicon planes with selective epitaxial growth. Applied Optics. 35: 3466-70. PMID 21102736 DOI: 10.1364/Ao.35.003466 |
0.411 |
|
| 1996 |
Denton JP, Neudeck GW. Fully depleted dual-gated thin-film SOI P-MOSFETs fabricated in SOI islands with an isolated buried polysilicon backgate Ieee Electron Device Letters. 17: 509-511. DOI: 10.1109/55.541764 |
0.396 |
|
| 1996 |
Sherman JM, Neudeck GW, Denton JP, Bashir R, Fultz WW. Elimination of the sidewall defects in Selective Epitaxial Growth (SEG) of silicon for a dielectric isolation technology Ieee Electron Device Letters. 17: 267-269. DOI: 10.1109/55.496453 |
0.544 |
|
| 1995 |
Bashir R, Kim S, Qadri N, Jin D, Neudeck GW, Denton JP, Yeric G, Wu K, Tasch A. Degradation of insulators in Silicon Selective Epitaxial Growth (SEG) ambient Ieee Electron Device Letters. 16: 382-384. DOI: 10.1109/55.406795 |
0.487 |
|
| 1992 |
Bashir R, Venkatesan S, Neudeck GW, Denton JP. A Polysilicon Contacted Subcollector BJT for a Three-Dimensional BiCMOS Process Ieee Electron Device Letters. 13: 392-395. DOI: 10.1109/55.192769 |
0.476 |
|
| 1992 |
Glenn JL, Neudeck GW, Subramanian CK, Denton JP. Fully planar method for creating adjacent ‘‘self‐isolating’’ silicon‐on‐insulator and epitaxial layers by epitaxial lateral overgrowth Applied Physics Letters. 60: 483-485. DOI: 10.1063/1.106643 |
0.485 |
|
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