Ali Dasdan - Publications
Affiliations: | University of Illinois, Urbana-Champaign, Urbana-Champaign, IL |
Year | Citation | Score | |||
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2017 | Shariat S, Orten B, Dasdan A. Online evaluation of bid prediction models in a large-scale computational advertising platform: decision making and insights Knowledge and Information Systems. 51: 37-60. DOI: 10.1007/S10115-016-0972-6 | 0.327 | |||
2010 | Papadimitriou P, Dasdan A, Garcia-Molina H. Web graph similarity for anomaly detection Journal of Internet Services and Applications. 1: 19-30. DOI: 10.1007/S13174-010-0003-X | 0.32 | |||
2009 | Dasdan A. Provably efficient algorithms for resolving temporal and spatial difference constraint violations Acm Transactions On Design Automation of Electronic Systems. 14: 8. DOI: 10.1145/1455229.1455237 | 0.454 | |||
2007 | Salman E, Dasdan A, Taraporevala F, Küçükçakar K, Friedman EG. Exploiting setup - Hold-time interdependence in static timing analysis Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 26: 1114-1125. DOI: 10.1109/Tcad.2006.885834 | 0.462 | |||
2004 | Dasdan A. Experimental analysis of the fastest optimum cycle ratio and mean algorithms Acm Transactions On Design Automation of Electronic Systems. 9: 385-418. DOI: 10.1145/1027084.1027085 | 0.487 | |||
1998 | Dasdan A, Ramanathan D, Gupta RK. A timing-driven design and validation methodology for embedded real-time systems Acm Transactions On Design Automation of Electronic Systems. 3: 533-553. DOI: 10.1145/296333.296338 | 0.42 | |||
1998 | Mathur A, Dasdan A, Gupta RK. Rate analysis for embedded systems Acm Transactions On Design Automation of Electronic Systems. 3: 408-436. DOI: 10.1145/293625.293631 | 0.473 | |||
1998 | Dasdan A, Gupta RK. Faster maximum and minimum mean cycle algorithms for system-performance analysis Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 17: 889-899. DOI: 10.1109/43.728912 | 0.556 | |||
1997 | Dasdan A, Aykanat C. Two novel multiway circuit partitioning algorithms using relaxed locking Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 16: 169-178. DOI: 10.1109/43.573831 | 0.422 | |||
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