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Tamer Cakici, Ph.D. - Publications

Affiliations: 
2007 Electrical and Computer Engineering Purdue University, West Lafayette, IN, United States 
Area:
Electronics and Electrical Engineering
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6 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2007 Cakici T, Keejong K, Roy K. FinFET based SRAM design for low standby power application Proceedings - Eighth International Symposium On Quality Electronic Design, Isqed 2007. 127-132. DOI: 10.1109/ISQED.2007.76  0.444
2007 Hwang ME, Cakici T, Roy K. Process tolerant β-ratio modulation for ultra-dynamic voltage scaling Proceedings -Design, Automation and Test in Europe, Date. 1550-1555. DOI: 10.1109/DATE.2007.364521  0.313
2006 Roy K, Mahmoodi H, Mukhopadhyay S, Ananthan H, Bansal A, Cakici T. Double-gate SOI devices for low-power and high-performance applications Proceedings of the Ieee International Conference On Vlsi Design. 2006: 445-452. DOI: 10.1109/VLSID.2006.74  0.439
2005 Cakici T, Mahmoodi H, Mukhopadhyay S, Roy K. Independent gate skewed logic in double-gate SOI technology Proceedings - Ieee International Soi Conference. 2005: 83-84. DOI: 10.1109/SOI.2005.1563543  0.413
2003 Cakici T, Bansal A, Roy K. A Low Power Four Transistor Schmitt Trigger for Asymmetric Double Gate Fully Depleted SOI Devices Ieee International Soi Conference. 21-22.  0.377
2002 Cakici T, Roy K. Current mirror evaluation logic: A new circuit style for high fan-in dynamic gates European Solid-State Circuits Conference. 395-398.  0.391
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