Xin Sun
Affiliations: | 2010 | Electrical Engineering & Computer Sciences | University of California, Berkeley, Berkeley, CA, United States |
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Sign in to add mentorTsu-Jae King Liu | grad student | 2010 | UC Berkeley | |
(Nanoscale bulk MOSFET design and process technology for reduced variability.) |
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Publications
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Ho B, Sun X, Shin C, et al. (2013) Design Optimization of Multigate Bulk MOSFETs Ieee Transactions On Electron Devices. 60: 28-33 |
Ho B, Sun X, Xu N, et al. (2012) First Demonstration of Quasi-Planar Segmented-Channel MOSFET Design for Improved Scalability Ieee Transactions On Electron Devices. 59: 2273-2276 |
Sun X, Moroz V, Damrongplasit N, et al. (2011) Variation study of the planar ground-plane bulk MOSFET, SOI FinFET, and trigate bulk MOSFET designs Ieee Transactions On Electron Devices. 58: 3294-3299 |
Shin C, Damrongplasit N, Sun X, et al. (2011) Performance and yield benefits of quasi-planar bulk CMOS technology for 6-T SRAM at the 22-nm node Ieee Transactions On Electron Devices. 58: 1846-1854 |
Sun X, Liu TK. (2010) Spacer Gate Lithography for Reduced Variability Due to Line Edge Roughness Ieee Transactions On Semiconductor Manufacturing. 23: 311-315 |
Sun X, Liu TK. (2009) Scale-Length Assessment of the Trigate Bulk MOSFET Design Ieee Transactions On Electron Devices. 56: 2840-2842 |
Shin C, Sun X, Liu TK. (2009) Study of Random-Dopant-Fluctuation (RDF) Effects for the Trigate Bulk MOSFET Ieee Transactions On Electron Devices. 56: 1538-1542 |
Sun X, Lu Q, Moroz V, et al. (2008) Tri-gate bulk MOSFET design for CMOS scaling to the end of the roadmap Ieee Electron Device Letters. 29: 491-493 |
Sun X, Lu Q, Takeuchi H, et al. (2007) Selective enhancement of SiO2 etch rate by Ar-ion implantation for improved etch depth control Electrochemical and Solid-State Letters. 10: 89-91 |