Guoling Han, Ph.D.

Affiliations: 
2007 University of California, Los Angeles, Los Angeles, CA 
Area:
Computer system architecture, energy-efficient computing, reconfigurable computing, electronic design automation, fault-tolerant design of VLSI systems, design for nanotechnologies, design and analysis of algorithms
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"Guoling Han"

Parents

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Jason Cong grad student 2007 UCLA
 (Synthesis techniques for application-specific processor-based design.)
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Publications

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Cong J, Gururaj K, Han G, et al. (2009) Synthesis algorithm for application-specific homogeneous processor networks Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 17: 1318-1329
Cong J, Han G, Zhang Z. (2006) Architecture and Compiler Optimizations for Data Bandwidth Improvement in Configurable Processors Ieee Transactions On Very Large Scale Integration Systems. 14: 986-997
Cong J, Fan Y, Han G, et al. (2004) Architecture and synthesis for on-chip multicycle communication Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 23: 550-564
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