Ajay Balankutty, Ph.D.
Affiliations: | 2010 | Columbia University, New York, NY |
Google:
"Ajay Balankutty"Parents
Sign in to add mentor| Peter Kinget | grad student | 2010 | Columbia | |
| (Architectures and circuit design techniques for ultra low voltage CMOS receivers.) | ||||
BETA: Related publications
See more...
Publications
|
You can help our author matching system! If you notice any publications incorrectly attributed to this author, please sign in and mark matches as correct or incorrect. |
| Kim J, Balankutty A, Dokania RK, et al. (2019) A 112 Gb/s PAM-4 56 Gb/s NRZ Reconfigurable Transmitter With Three-Tap FFE in 10-nm FinFET Ieee Journal of Solid-State Circuits. 54: 29-42 |
| Kim J, Balankutty A, Elshazly A, et al. (2015) A 16-to-40Gb/s quarter-rate NRZ/PAM4 dual-mode transmitter in 14nm CMOS Digest of Technical Papers - Ieee International Solid-State Circuits Conference. 58: 60-61 |
| Elshazly A, Balankutty A, Huang YY, et al. (2014) A 2GHz-to-7.5GHz quadrature clock-generator using digital delay locked loops for multi-standard I/Os in 14nm CMOS Ieee Symposium On Vlsi Circuits, Digest of Technical Papers |
| Lakdawala H, Schaecher M, Fu CT, et al. (2013) A 32 nm SoC with dual core ATOM processor and RF wifi transceiver Ieee Journal of Solid-State Circuits. 48: 91-103 |
| Tan Y, Duster J, Fu CT, et al. (2012) A 2.4GHz WLAN transceiver with fully-integrated highly-linear 1.8V 28.4dBm PA, 34dBm T/R switch, 240MS/s DAC, 320MS/s ADC, and DPLL in 32nm SoC CMOS Ieee Symposium On Vlsi Circuits, Digest of Technical Papers. 76-77 |
| Lakdawala H, Schaecher M, Fu CT, et al. (2012) 32nm x86 OS-compliant PC on-chip with dual-core Atom® processor and RF WiFi transceiver Digest of Technical Papers - Ieee International Solid-State Circuits Conference. 55: 62-63 |
| Balankutty A, Kinget PR. (2011) Ultra-low voltage integrated receivers in nanoscale CMOS Midwest Symposium On Circuits and Systems |
| Balankutty A, Kinget PR. (2011) An Ultra-low voltage, low-noise, high linearity 900-MHz receiver with digitally calibrated in-band feed-forward interferer cancellation in 65-nm CMOS Ieee Journal of Solid-State Circuits. 46: 2268-2283 |
| Balankutty A, Pellerano S, Kamgaing T, et al. (2011) A 12-element 60GHz CMOS phased array transmitter on LTCC package with integrated antennas 2011 Proceedings of Technical Papers: Ieee Asian Solid-State Circuits Conference 2011, a-Sscc 2011. 273-276 |
| Balankutty A, Kinget P. (2010) 0.6V, 5dB NF, -9.8dBm IIP3, 900MHz receiver with interference cancellation Ieee Symposium On Vlsi Circuits, Digest of Technical Papers. 183-184 |