Debabrata Mohapatra, Ph.D.
Affiliations: | 2011 | Electrical and Computer Engineering | Purdue University, West Lafayette, IN, United States |
Area:
Electronics and Electrical EngineeringGoogle:
"Debabrata Mohapatra"Parents
Sign in to add mentor| Kaushik Roy | grad student | 2011 | Purdue | |
| (Approximate computing: Enabling voltage over-scaling in multimedia applications.) | ||||
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Publications
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| Chippa VK, Mohapatra D, Roy K, et al. (2014) Scalable effort hardware design Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 22: 2004-2016 |
| Gupta V, Mohapatra D, Raghunathan A, et al. (2013) Low-Power Digital Signal Processing Using Approximate Adders Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 32: 124-137 |
| Chippa VK, Jayakumar H, Mohapatra D, et al. (2013) Energy-efficient recognition and mining processor using scalable effort design Proceedings of the Custom Integrated Circuits Conference |
| Chang IJ, Mohapatra D, Roy K. (2011) A Priority-Based 6T/8T Hybrid SRAM Architecture for Aggressive Voltage Scaling in Video Applications Ieee Transactions On Circuits and Systems For Video Technology. 21: 101-112 |
| Ghosh S, Mohapatra D, Karakonstantis G, et al. (2010) Voltage scalable high-speed robust hybrid arithmetic units using adaptive clocking Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 18: 1301-1309 |