Pritish Narayanan, Ph.D.
Affiliations: | 2013 | Electrical & Computer Engineering | University of Massachusetts, Amherst, Amherst, MA |
Area:
Computer Engineering, Electronics and Electrical Engineering, NanotechnologyGoogle:
"Pritish Narayanan"Parents
Sign in to add mentor| Csaba A. Moritz | grad student | 2013 | U Mass Amherst | |
| (NASICs: A 'fabric-centric' approach towards integrated nanosystems.) | ||||
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Publications
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| Chang H, Narayanan P, Lewis SC, et al. (2019) AI hardware acceleration with analog memory: Microarchitectures for low energy at high speed Journal of Reproduction and Development. 63 |
| Giordano M, Cristiano G, Ishibashi K, et al. (2019) Analog-to-Digital Conversion With Reconfigurable Function Mapping for Neural Networks Activation Function Acceleration Ieee Journal On Emerging and Selected Topics in Circuits and Systems. 9: 367-376 |
| Romero LP, Ambrogio S, Giordano M, et al. (2018) Training fully connected networks with resistive memories: impact of device failures. Faraday Discussions |
| Ambrogio S, Narayanan P, Tsai H, et al. (2018) Equivalent-accuracy accelerated neural-network training using analogue memory. Nature. 558: 60-67 |
| Fumarola A, Sidler S, Moon K, et al. (2018) Bidirectional Non-Filamentary RRAM as an Analog Neuromorphic Synapse, Part II: Impact of Al/Mo/Pr 0.7 Ca 0.3 MnO 3 Device Characteristics on Neural Network Training Accuracy Ieee Journal of the Electron Devices Society. 6: 169-178 |
| Moon K, Fumarola A, Sidler S, et al. (2018) Bidirectional Non-Filamentary RRAM as an Analog Neuromorphic Synapse, Part I: Al/Mo/Pr 0.7 Ca 0.3 MnO 3 Material Improvements and Device Measurements Ieee Journal of the Electron Devices Society. 6: 146-155 |
| Cristiano G, Giordano M, Ambrogio S, et al. (2018) Perspective on training fully connected networks with resistive memories: Device requirements for multiple conductances of varying significance Journal of Applied Physics. 124: 151901 |
| Narayanan P, Fumarola A, Sanches LL, et al. (2017) Toward on-chip acceleration of the backpropagation algorithm using nonvolatile memory Journal of Reproduction and Development. 61: 11 |
| Narayanan P, Burr GW, Virwani K, et al. (2016) Circuit-Level Benchmarking of Access Devices for Resistive Nonvolatile Memory Arrays Ieee Journal On Emerging and Selected Topics in Circuits and Systems |
| Virwani K, Burr GW, Narayanan P, et al. (2015) Mixed-Ionic-Electronic-Conduction (MIEC)-Based Access Devices for 3D Multilayer Crosspoint Memory Mrs Proceedings. 1729: 3-14 |