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|Kumthekar B, Somenzi F. (2000) Power and delay reduction via simultaneous logic and placement optimization in FPGAs Proceedings -Design, Automation and Test in Europe, Date. 202-207|
|Kumthekar B, Benini L, Macii E, et al. (2000) Power optimisation of FPGA-based designs without rewiring Iee Proceedings: Computers and Digital Techniques. 147: 167-174|