Ken Choi
Affiliations: | Electrical and Computer Engineering | Illinois Institute of Technology, Chicago, IL, United States |
Area:
Electronics and Electrical Engineering, NanotechnologyGoogle:
"Ken Choi"Children
Sign in to add trainee| Yu-Chi Tsao | grad student | 2011 | Illinois Institute of Technology |
| Haiqing Nan | grad student | 2012 | Illinois Institute of Technology |
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Publications
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| Tong Q, Choi K. (2017) Activity correlation-based clustering clock-gating technique for digital filters International Journal of Electronics. 104: 1095-1106 |
| Choi K, Nan H, Choi W. (2015) Advances in Smart and Intelligent Multimedia Platforms for Pervasive Computing Multimedia Tools and Applications. 74: 1537-1539 |
| Zhang Y, Kim J, Choi K, et al. (2014) High Performance and Low Power Hardware Implementation for Cryptographic Hash Functions International Journal of Distributed Sensor Networks. 10: 736312 |
| Li L, Choi K, Nan H. (2013) Activity-driven fine-grained clock gating and run time power gating integration Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 21: 1540-1544 |
| Cho J, Soekamtoputra S, Choi K, et al. (2013) Power dissipation and area comparison of 512-bit and 1024-bit key AES Computers & Mathematics With Applications. 65: 1378-1383 |
| Tsao Y, Choi K. (2012) Area-Efficient Parallel FIR Digital Filter Structures for Symmetric Convolutions Based on Fast FIR Algorithm Ieee Transactions On Very Large Scale Integration Systems. 20: 366-371 |
| Tsao Y, Choi K. (2012) Area-Efficient VLSI Implementation for Parallel Linear-Phase FIR Digital Filters of Odd Length Based on Fast FIR Algorithm Ieee Transactions On Circuits and Systems Ii-Express Briefs. 59: 371-375 |
| Nan H, Choi K. (2012) High performance, low cost, and robust soft error tolerant latch designs for nanoscale CMOS technology Ieee Transactions On Circuits and Systems I: Regular Papers. 59: 1445-1457 |
| Nan H, Choi K. (2012) Low cost and highly reliable hardened latch design for nanoscale CMOS technology Microelectronics Reliability. 52: 1209-1214 |
| Nan H, Kim KK, Wang W, et al. (2011) Dynamic Voltage and Frequency Scaling for Power-Constrained Design using Process Voltage and Temperature Sensor Circuits Journal of Information Processing Systems. 7: 93-102 |