Bapiraju Vinnakota

Electronics and Electrical Engineering

Wanli Jiang	grad student	2000	UMN
Seonki Kim	grad student	2002	UMN

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Jiang W, Vinnakota B. (2002) Statistical threshold formulation for dynamic I/sub dd/ test Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 21: 694-705
Vinnakota B, Harjani R. (2000) DFT for digital detection of analog parametric faults in SC filters Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 19: 789-798
Jiang W, Vinnakota B. (2000) IC test using the energy consumption ratio Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 19: 129-141
Harjani R, Vinnakota B. (1997) Analog circuit observer blocks Ieee Transactions On Circuits and Systems Ii: Analog and Digital Signal Processing. 44: 154-163
Amin MB, Vinnakota B. (1997) Workload Distribution in Fault Simulation Journal of Electronic Testing. 10: 277-282
Vinnakota B. (1997) Monitoring Power Dissipation for Fault Detection Journal of Electronic Testing. 11: 173-181
Stessman NJ, Vinnakota B, Harjani R. (1996) System-level design for test of fully differential analog circuits Ieee Journal of Solid-State Circuits. 31: 1526-1534
Vinnakota B, Harjani R. (1995) Self-Initializing Memory Elements Ieee Transactions On Circuits and Systems Ii: Analog and Digital Signal Processing. 42: 461-472