Carlton M. Osburn

Affiliations: 
North Carolina State University, Raleigh, NC 
Area:
Materials Science Engineering, Electronics and Electrical Engineering
Website:
https://ece.ncsu.edu/people/osburn/
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"Carlton M. Osburn"
Bio:

https://www.electrochem.org/osburn
https://www.proquest.com/openview/ea82ee606b979a5f23bcd903b0d10987/1

Parents

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Robert Wilson Vest grad student 1970 Purdue
 (The electrical properties of grain boundaries in nickel-oxide and magnesium-oxide)

Children

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Kam F. Yee grad student 2000 NCSU
Indong Kim grad student 2003 NCSU
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Publications

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Kim I, Han SK, Osburn CM. (2004) Effect of Post Metallization Annealing for Alternative Gate Stack Devices Journal of the Electrochemical Society. 151
Kim I, Han SK, Osburn CM. (2004) Stability of Advanced Gate Stack Devices Journal of the Electrochemical Society. 151
Osburn CM, Kim I, Han SK, et al. (2002) Vertically scaled MOSFET gate stacks and junctions: How far are we likely to go? Ibm Journal of Research and Development. 46: 299-315
Osburn CM, De I, Yee KF, et al. (2000) Design and integration considerations for end-of-the roadmap ultrashallow junctions Journal of Vacuum Science & Technology B. 18: 338-345
Ahmed K, De I, Osburn C, et al. (2000) Limitations of the modified shift-and-ratio technique for extraction of the bias dependence of L/sub eff/ and R/sub sd/ of LDD MOSFETs Ieee Transactions On Electron Devices. 47: 891-893
De I, Johri D, Srivastava A, et al. (2000) Impact of gate workfunction on device performance at the 50 nm technology node Solid-State Electronics. 44: 1077-1080
De I, Osburn CM. (1999) Impact of super-steep-retrograde channel doping profiles on the performance of scaled devices Ieee Transactions On Electron Devices. 46: 1711-1717
Srivastava A, Heinisch HH, Vogel E, et al. (1998) Evaluation of 2.0 nm grown and deposited dielectrics in 0.1 μm PMOSFETs Materials Research Society Symposium - Proceedings. 525: 163-170
Yee KF, Osburn CM, Masnari NA, et al. (1998) Evaluation and comparison of 3.0 nm gate-stack dielectrics for tenth-micron technology NMOSFETs Materials Research Society Symposium - Proceedings. 525: 157-162
Sun J, Bartholomew RF, Bellur K, et al. (1998) Parasitic Resistance Considerations of Using Elevated Source/Drain Technology for Deep Submicron Metal Oxide Semiconductor Field Effect Transistors Journal of the Electrochemical Society. 145: 2131-2137
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