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Chia-Hsiang Yang, Ph.D. - Publications

Affiliations: 
2010 University of California, Los Angeles, Los Angeles, CA 
Area:
Integrated circuits for emerging radio and healthcare systems, energy-efficient flexible digital integrated circuits, circuit and architecture design with post-CMOS devices, optimization methods and CAD flows
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30 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2020 Lee Y, Chi T, Yang C. A 2.17-mW Acoustic DSP Processor With CNN-FFT Accelerators for Intelligent Hearing Assistive Devices Ieee Journal of Solid-State Circuits. 55: 2247-2258. DOI: 10.1109/Jssc.2020.2987695  0.447
2020 Huang S, Chang K, Liou H, Yang C. A 1.9-mW SVM Processor With On-Chip Active Learning for Epileptic Seizure Control Ieee Journal of Solid-State Circuits. 55: 452-464. DOI: 10.1109/Jssc.2019.2954775  0.388
2019 Sun W, Chen Y, Yang C, Ueng Y. Iterative Inter-Cell Interference Cancellation Receiver for LDPC-Coded MIMO Systems Ieee Transactions On Signal Processing. 67: 1636-1647. DOI: 10.1109/Tsp.2019.2894776  0.451
2019 Sun W, Su Y, Ueng Y, Yang C. An LDPC-Coded SCMA Receiver With Multi-User Iterative Detection and Decoding Ieee Transactions On Circuits and Systems I-Regular Papers. 66: 3571-3584. DOI: 10.1109/Tcsi.2019.2925826  0.446
2019 Chen Y, Sun W, Cheng C, Tsai T, Ueng Y, Yang C. An Integrated Message-Passing Detector and Decoder for Polar-Coded Massive MU-MIMO Systems Ieee Transactions On Circuits and Systems I-Regular Papers. 66: 1205-1218. DOI: 10.1109/Tcsi.2018.2879860  0.443
2019 Wang Y, Wang Y, Wu Y, Yang C. A 12.6 mW, 573–2901 kS/s Reconfigurable Processor for Reconstruction of Compressively Sensed Physiological Signals Ieee Journal of Solid-State Circuits. 54: 2907-2916. DOI: 10.1109/Jssc.2019.2933309  0.431
2018 Chou T, Chang K, Jhang J, Chiu S, Wang G, Yang C, Chiueh H, Chen H, Hsieh C, Chang M, Tang K. A 1-V 2.6-mW Environmental Compensated Fully Integrated Nose-on-a-Chip Ieee Transactions On Circuits and Systems Ii-Express Briefs. 65: 1365-1369. DOI: 10.1109/Tcsii.2018.2854588  0.396
2018 Yeh C, Chu T, Chen C, Yang C. A Hardware-Scalable DSP Architecture for Beam Selection in mm-Wave MU-MIMO Systems Ieee Transactions On Circuits and Systems I-Regular Papers. 65: 3918-3928. DOI: 10.1109/Tcsi.2018.2856124  0.368
2017 Wu YC, Chang CH, Hung JH, Yang CH. A 135-mW Fully Integrated Data Processor for Next-Generation Sequencing. Ieee Transactions On Biomedical Circuits and Systems. 11: 1216-1225. PMID 29293419 DOI: 10.1109/Tbcas.2017.2760109  0.417
2017 Tsai Y, Chen C, Yang C. A Flexible Geometric Mean Decomposition Processor for MIMO Communication Systems Ieee Transactions On Circuits and Systems I-Regular Papers. 64: 446-456. DOI: 10.1109/Tcsi.2016.2604380  0.464
2017 Li M, Yang C, Ueng Y. A 5.28-Gb/s LDPC Decoder With Time-Domain Signal Processing for IEEE 802.15.3c Applications Ieee Journal of Solid-State Circuits. 52: 592-604. DOI: 10.1109/Jssc.2016.2624983  0.462
2016 Chang CH, Chou MT, Wu YC, Hong TW, Li YL, Yang CH, Hung JH. sBWT: Memory Efficient Implementation of the Hardware-acceleration-friendly Schindler Transform for the Fast Biological Sequence Mapping. Bioinformatics (Oxford, England). PMID 27412087 DOI: 10.1093/Bioinformatics/Btw419  0.315
2016 Lee CY, Hsieh PH, Yang CH. A Standard-Cell-Design-Flow Compatible Energy-Recycling Logic With 70% Energy Saving Ieee Transactions On Circuits and Systems I: Regular Papers. 63: 70-79. DOI: 10.1109/Tcsi.2015.2510620  0.409
2015 Yang CH, Shih YH, Chiueh H. An 81.6 μW FastICA processor for epileptic seizure detection. Ieee Transactions On Biomedical Circuits and Systems. 9: 60-71. PMID 24968296 DOI: 10.1109/Tbcas.2014.2318592  0.456
2015 Chen CE, Tsai YC, Yang CH. An iterative geometric mean decomposition algorithm for MIMO communications systems Ieee Transactions On Wireless Communications. 14: 343-352. DOI: 10.1109/Twc.2014.2347051  0.375
2015 Sun WC, Wu WH, Yang CH, Ueng YL. An iterative detection and decoding receiver for LDPC-coded MIMO systems Ieee Transactions On Circuits and Systems I: Regular Papers. 62: 2512-2522. DOI: 10.1109/Tcsi.2015.2468998  0.472
2015 Yang CH, Chou CW, Hsu CS, Chen CE. A Systolic Array Based GTD Processor With a Parallel Algorithm Ieee Transactions On Circuits and Systems I: Regular Papers. 62: 1099-1108. DOI: 10.1109/Tcsi.2015.2388831  0.483
2014 Chiu SW, Wang JH, Chang KH, Chang TH, Wang CM, Chang CL, Tang CT, Chen CF, Shih CH, Kuo HW, Wang LC, Chen H, Hsieh CC, Chang MF, Liu YW, ... ... Yang CH, et al. A fully integrated nose-on-a-chip for rapid diagnosis of ventilator-associated pneumonia. Ieee Transactions On Biomedical Circuits and Systems. 8: 765-78. PMID 25576573 DOI: 10.1109/Tbcas.2014.2377754  0.341
2014 Cheng C, Yang J, Lee H, Yang C, Ueng Y. A Fully Parallel LDPC Decoder Architecture Using Probabilistic Min-Sum Algorithm for High-Throughput Applications Ieee Transactions On Circuits and Systems. 61: 2738-2746. DOI: 10.1109/Tcsi.2014.2312479  0.436
2014 Yang C, Huang T, Li M, Ueng Y. A 5.4 $\mu{\rm W}$ Soft-Decision BCH Decoder for Wireless Body Area Networks Ieee Transactions On Circuits and Systems. 61: 2721-2729. DOI: 10.1109/Tcsi.2014.2312478  0.444
2012 Yu T, Yang C, Cabric D, Markovic D. A 7.4-mW 200-MS/s Wideband Spectrum Sensing Digital Baseband Processor for Cognitive Radios Ieee Journal of Solid-State Circuits. 47: 2235-2245. DOI: 10.1109/Jssc.2012.2195933  0.579
2012 Yang C, Yu T, Markovic D. Power and Area Minimization of Reconfigurable FFT Processors: A 3GPP-LTE Example Ieee Journal of Solid-State Circuits. 47: 757-768. DOI: 10.1109/Jssc.2011.2176163  0.594
2011 Yuan FL, Yang CH, Marković D. A hardware-efficient VLSI architecture for hybrid sphere-MCMC detection Globecom - Ieee Global Telecommunications Conference. DOI: 10.1109/GLOCOM.2011.6134312  0.518
2010 Li CT, Kubo DY, Wilson W, Lin KY, Chen MT, Ho PTP, Chen CC, Han CC, Oshiro P, Martin-Cocher P, Chang CH, Chang SH, Altamirano P, Jiang H, Chiueh TD, ... ... Yang CH, et al. AMiBA wideband analog correlator Astrophysical Journal. 716: 746-757. DOI: 10.1088/0004-637X/716/1/746  0.336
2009 Yang CH, Marković D. A flexible DSP architecture for MIMO sphere decoding Ieee Transactions On Circuits and Systems I: Regular Papers. 56: 2301-2314. DOI: 10.1109/Tcsi.2008.2012210  0.614
2009 Yang CH, Markovic D. A 2.89mW 50GOPS 16 × 16 16-core MIMO sphere decoder in 90nm CMOS Esscirc 2009 - Proceedings of the 35th European Solid-State Circuits Conference. 344-347. DOI: 10.1109/ESSCIRC.2009.5325957  0.57
2008 Nanda R, Yang CH, Markovic D. DSP architecture optimization in Matlab/Simulink environment Ieee Symposium On Vlsi Circuits, Digest of Technical Papers. 182-183. DOI: 10.1109/VLSIC.2008.4586003  0.617
2008 Yang CH, Marković D. A flexible VLSI architecture for extracting diversity and spatial multiplexing gains in MIMO channels Ieee International Conference On Communications. 725-731. DOI: 10.1109/ICC.2008.142  0.58
2008 Yang CH, Marković D. A multi-core sphere decoder VLSI architecture for MIMO communications Globecom - Ieee Global Telecommunications Conference. 3297-3302. DOI: 10.1109/GLOCOM.2008.ECP.633  0.573
2004 Li C, Kubo D, Han C, Chen C, Chen M, Lien C, Wang H, Wei R, Yang C, Chiueh T, Peterson J, Kesteven M, Wilson W. A wideband analog correlator system for AMiBA Proceedings of Spie. 5498: 455-463. DOI: 10.1117/12.550993  0.39
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