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Cheongyuen W. Tsang, Ph.D. - Publications

Affiliations: 
2008 University of California, Berkeley, Berkeley, CA, United States 
Area:
Integrated Circuits (INC); Communications & Networking (COMNET); Design, Modeling and Analysis (DMA); Computer Architecture & Engineering (ARC)
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6 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2013 Tsang CW, Foster M, Stone D, Gladwin D. Active current ripple cancellation in parallel connected buck converter modules Iet Power Electronics. 6: 721-731. DOI: 10.1049/iet-pel.2012.0383  0.315
2013 Tsang CW, Foster M, Stone D. Parallel buck converter with non-identical power modules for improved transient efficient Pcim Europe Conference Proceedings. 1476-1483.  0.32
2012 Hoyos S, Tsang CW, Vanderhaegen J, Chiu Y, Aibara Y, Khorramabadi H, Nikolic B. A 15 MHz to 600 MHz, 20 mW, 0.38 mm 2 split-control, fast coarse locking digital DLL in 0.13 μ m CMOS Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 20: 564-568. DOI: 10.1109/Tvlsi.2011.2106170  0.499
2008 Hoyos S, Tsang CW, Vanderhaegen J, Chiu Y, Aibara Y, Khorramabadi H, Nikolić B. A 15 MHz - 600 MHz, 20 mW, 0.38 mm2, fast coarse locking digital DLL in 0.13μm CMOS Esscirc 2008 - Proceedings of the 34th European Solid-State Circuits Conference. 90-93. DOI: 10.1109/ESSCIRC.2008.4681799  0.511
2006 Tsang CW, Chiu Y, Nikolic B. A 1.2V, 10.8mW, 500kHz sigma-delta modulator with 84dB SNDR and 96dB SFDR Ieee Symposium On Vlsi Circuits, Digest of Technical Papers. 162-163.  0.487
2004 Chiu Y, Tsang CW, Nikolić B, Gray PR. Least mean square adaptive digital background calibration of pipelined analog-to-digital converters Ieee Transactions On Circuits and Systems I: Regular Papers. 51: 38-46. DOI: 10.1109/Tcsi.2003.821306  0.457
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