Year |
Citation |
Score |
2020 |
Xie Z, Zhang X. Reduced-Complexity Key Equation Solvers for Generalized Integrated Interleaved BCH Decoders Ieee Transactions On Circuits and Systems I-Regular Papers. 1-10. DOI: 10.1109/Tcsi.2020.2999823 |
0.346 |
|
2019 |
Zhang X, Xie Z. Efficient VLSI Architectures for Coupled-Layered Regenerating Codes Ieee Transactions On Circuits and Systems Ii-Express Briefs. 1-1. DOI: 10.1109/Tcsii.2019.2953207 |
0.43 |
|
2019 |
Zhang X. A Low-Power Parallel Architecture for Linear Feedback Shift Registers Ieee Transactions On Circuits and Systems Ii-Express Briefs. 66: 412-416. DOI: 10.1109/Tcsii.2018.2860934 |
0.341 |
|
2019 |
Zhang X, Xie Z. Efficient Architectures for Generalized Integrated Interleaved Decoder Ieee Transactions On Circuits and Systems I-Regular Papers. 66: 4018-4031. DOI: 10.1109/Tcsi.2019.2916698 |
0.524 |
|
2019 |
Zhang X, Lao Y. On the Construction of Composite Finite Fields for Hardware Obfuscation Ieee Transactions On Computers. 68: 1353-1364. DOI: 10.1109/Tc.2019.2901483 |
0.505 |
|
2019 |
Zhang X, Xie Z. Relaxing the Constraints on Locally Recoverable Erasure Codes by Finite Field Element Variation Ieee Communications Letters. 23: 1680-1683. DOI: 10.1109/Lcomm.2019.2927668 |
0.533 |
|
2018 |
Zhang X. Generalized Three-Layer Integrated Interleaved Codes Ieee Communications Letters. 22: 442-445. DOI: 10.1109/Lcomm.2017.2780132 |
0.459 |
|
2017 |
Zhang X, Tai Y. Low-Complexity Transformed Encoder Architectures for Quasi-Cyclic Nonbinary LDPC Codes Over Subfields Ieee Transactions On Very Large Scale Integration Systems. 25: 1342-1351. DOI: 10.1109/Tvlsi.2016.2630055 |
0.524 |
|
2017 |
Zhang X. Modified Generalized Integrated Interleaved Codes for Local Erasure Recovery Ieee Communications Letters. 21: 1241-1244. DOI: 10.1109/Lcomm.2017.2675905 |
0.514 |
|
2016 |
Zhang X, Sprouse S, Ilani I. A Flexible and Low-Complexity Local Erasure Recovery Scheme Ieee Communications Letters. 20: 2129-2132. DOI: 10.1109/Lcomm.2016.2604307 |
0.465 |
|
2014 |
Cai F, Zhang X, Declercq D, Planjery SK, Vasić B. Finite alphabet iterative decoders for LDPC codes: Optimization, architecture and analysis Ieee Transactions On Circuits and Systems I: Regular Papers. 61: 1366-1375. DOI: 10.1109/Tcsi.2014.2309896 |
0.53 |
|
2013 |
Cai F, Zhang X. Relaxed min-max decoder architectures for nonbinary low-density parity-check codes Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 21: 2010-2023. DOI: 10.1109/Tvlsi.2012.2226920 |
0.545 |
|
2013 |
Zhang X. An Efficient Interpolation-Based Chase BCH Decoder Ieee Transactions On Circuits and Systems Ii-Express Briefs. 60: 212-216. DOI: 10.1109/Tcsii.2013.2251941 |
0.585 |
|
2013 |
Zhang X, Zheng Y. Generalized Backward Interpolation for Algebraic Soft-Decision Decoding of Reed-Solomon Codes Ieee Transactions On Communications. 61: 13-23. DOI: 10.1109/Tcomm.2012.100912.110834 |
0.556 |
|
2012 |
Zhang X, Cai F, Lin S. Low-Complexity Reliability-Based Message-Passing Decoder Architectures for Non-Binary LDPC Codes Ieee Transactions On Very Large Scale Integration Systems. 20: 1938-1950. DOI: 10.1109/Tvlsi.2011.2164951 |
0.592 |
|
2012 |
Zhang X, Wu Y, Zhu J, Zheng Y. Novel Interpolation and Polynomial Selection for Low-Complexity Chase Soft-Decision Reed-Solomon Decoding Ieee Transactions On Very Large Scale Integration Systems. 20: 1318-1322. DOI: 10.1109/Tvlsi.2011.2150254 |
0.5 |
|
2012 |
Zhang X, Wang Z. A Low-Complexity Three-Error-Correcting BCH Decoder for Optical Transport Network Ieee Transactions On Circuits and Systems Ii-Express Briefs. 59: 663-667. DOI: 10.1109/Tcsii.2012.2208678 |
0.611 |
|
2012 |
Zhang X, Zheng Y. Systematically Re-encoded Algebraic Soft-Decision Reed–Solomon Decoder Ieee Transactions On Circuits and Systems Ii-Express Briefs. 59: 376-380. DOI: 10.1109/Tcsii.2012.2195066 |
0.548 |
|
2012 |
Zhang X, Zhu J, Zhang W. Efficient Reencoder Architectures for Algebraic Soft-Decision Reed–Solomon Decoding Ieee Transactions On Circuits and Systems Ii-Express Briefs. 59: 163-167. DOI: 10.1109/Tcsii.2012.2184376 |
0.564 |
|
2011 |
Zhang X, Cai F. Reduced-complexity decoder architecture for non-binary LDPC codes Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 19: 1229-1238. DOI: 10.1109/Tvlsi.2010.2047956 |
0.517 |
|
2011 |
Zhang X, Cai F. Efficient partial-parallel decoder architecture for quasi-cyclic nonbinary LDPC codes Ieee Transactions On Circuits and Systems I: Regular Papers. 58: 402-414. DOI: 10.1109/Tcsi.2010.2071830 |
0.572 |
|
2011 |
Paul S, Cai F, Zhang X, Bhunia S. Reliability-Driven ECC Allocation for Multiple Bit Error Resilience in Processor Cache Ieee Transactions On Computers. 60: 20-34. DOI: 10.1109/Tc.2010.203 |
0.397 |
|
2011 |
Cui Z, Wang Z, Zhang X. Reduced-complexity column-layered decoding and implementation for LDPC codes Iet Communications. 5: 2177-2186. DOI: 10.1049/Iet-Com.2010.1002 |
0.641 |
|
2010 |
Zhang X, Zhu J. Algebraic Soft-Decision Decoder Architectures for Long Reed–Solomon Codes Ieee Transactions On Circuits and Systems Ii-Express Briefs. 57: 787-792. DOI: 10.1109/Tcsii.2010.2067812 |
0.559 |
|
2010 |
Zhang X, Zhu J. High-Throughput Interpolation Architecture for Algebraic Soft-Decision Reed–Solomon Decoding Ieee Transactions On Circuits and Systems I-Regular Papers. 57: 581-591. DOI: 10.1109/Tcsi.2009.2023935 |
0.599 |
|
2009 |
Zhu J, Zhang X, Wang Z. Backward Interpolation Architecture for Algebraic Soft-Decision Reed–Solomon Decoding Ieee Transactions On Very Large Scale Integration Systems. 17: 1602-1615. DOI: 10.1109/Tvlsi.2008.2005575 |
0.676 |
|
2008 |
Zhu J, Zhang X. Efficient VLSI Architecture for Soft-Decision Decoding of Reed–Solomon Codes Ieee Transactions On Circuits and Systems. 55: 3050-3062. DOI: 10.1109/Tcsi.2008.923169 |
0.591 |
|
2007 |
Zhang X. Further Exploring the Strength of Prediction in the Factorization of Soft-Decision Reed–Solomon Decoding Ieee Transactions On Very Large Scale Integration Systems. 15: 811-820. DOI: 10.1109/Tvlsi.2007.899238 |
0.533 |
|
2007 |
Sklavos N, McLoone M, Zhang X. MONET special issue on next generation hardware architectures for secure mobile computing Mobile Networks and Applications. 12: 229-230. DOI: 10.1007/S11036-007-0023-3 |
0.361 |
|
2006 |
Zhang X. Reduced Complexity Interpolation Architecture for Soft-Decision Reed–Solomon Decoding Ieee Transactions On Very Large Scale Integration Systems. 14: 1156-1161. DOI: 10.1109/Tvlsi.2006.884177 |
0.568 |
|
2006 |
Zhang X, Parhi KK. On the optimum constructions of composite field for the AES algorithm Ieee Transactions On Circuits and Systems Ii: Express Briefs. 53: 1153-1157. DOI: 10.1109/Tcsii.2006.882217 |
0.508 |
|
2005 |
Zhang X, Parhi KK. High-speed architectures for parallel long BCH encoders Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 13: 872-877. DOI: 10.1109/Tvlsi.2005.850125 |
0.648 |
|
2004 |
Zhang X, Parhi KK. Fast factorization architecture in soft-decision reed-solomon decoding Ieee Workshop On Signal Processing Systems, Sips: Design and Implementation. 101-106. DOI: 10.1109/Tvlsi.2004.842914 |
0.653 |
|
2004 |
Zhang X, Parhi KK. High-speed VLSI architectures for the AES algorithm Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 12: 957-967. DOI: 10.1109/Tvlsi.2004.832943 |
0.571 |
|
2000 |
Zhang X. Implementation of a 12.8kbit/s LD-CELP speech codec Proceedings of the World Congress On Intelligent Control and Automation (Wcica). 4: 2499-2502. |
0.331 |
|
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