Bikram Baidya, Ph.D. - Publications
Affiliations: | 2003 | Carnegie Mellon University, Pittsburgh, PA |
Area:
Electronics and Electrical EngineeringYear | Citation | Score | |||
---|---|---|---|---|---|
2005 | Baidya B, Mukherjee T. Layout verification for mixed-domain integrated MEMS Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 24: 563-577. DOI: 10.1109/Tcad.2005.844100 | 0.638 | |||
2003 | Baidya B, Mukherjee T. Layout verification by extraction for micro total analysis systems 2003 Nanotechnology Conference and Trade Show - Nanotech 2003. 1: 262-265. | 0.63 | |||
2002 | Baidya B, Mukherjee T. Extraction and LVS for mixed-domain integrated MEMS layouts Ieee/Acm International Conference On Computer-Aided Design, Digest of Technical Papers. 361-366. DOI: 10.1145/774572.774626 | 0.67 | |||
2002 | Baidya B, Gupta SK, Mukherjee T. An extraction-based verification methodology for MEMS Journal of Microelectromechanical Systems. 11: 2-11. DOI: 10.1109/84.982857 | 0.626 | |||
2001 | Baidya B, Mukherjee T. Challenges in CMOS-MEMS extraction 2001 International Conference On Modeling and Simulation of Microsystems - Msm 2001. 108-111. | 0.64 | |||
2001 | Baidya B, He K, Mukherjee T. Layout Verification and Correction of CMOS-MEMS Layouts 2001 International Conference On Modeling and Simulation of Microsystems - Msm 2001. 426-429. | 0.531 | |||
Show low-probability matches. |