Xiaoning Qi, Ph.D. - Publications

Affiliations: 
2001 Stanford University, Palo Alto, CA 

6 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2011 Xu W, Wang G, Jiang J, Qi X, Zhang F. A high-PSR transient-enhanced output-capacitorless CMOS low-dropout regulator for SoC applications International Journal of Electronics. 98: 1319-1332. DOI: 10.1080/00207217.2011.593141  0.44
2006 Qi X, Lo SC, Gyure A, Luo Y, Shahram M, Singhal K, MacMillen DB. Efficient subthreshold leakage current optimization - Leakage current optimization and layout migration for 90- and 65- nm ASIC libraries Ieee Circuits & Devices. 22: 39-47. DOI: 10.1109/Mcd.2006.272999  0.318
2006 Qi X, Gyure A, Luo Y, Lo SC, Shahram M, Singhal K. Simulation of interconnect inductive impact in the presence of process variations in 90 nm and beyond Ieee Electron Device Letters. 27: 696-698. DOI: 10.1109/Led.2006.879039  0.344
2002 Kleveland B, Qi X, Madden L, Furusawa T, Dutton RW, Horowitz MA, Simon Wong S. High-frequency characterization of on-chip digital interconnects Ieee Journal of Solid-State Circuits. 37: 716-725. DOI: 10.1109/Jssc.2002.1004576  0.351
2001 Wang G, Qi X, Yu Z. Device level modeling of metal-insulator-semiconductor interconnects Ieee Transactions On Electron Devices. 48: 1672-1682. DOI: 10.1109/16.936590  0.421
2000 Qi X, Yue P, Arnborg T, Soh HT, Sakai H, Yu Z, Dutton RW. A fast 3D modeling approach to electrical parameters extraction of bonding wires for RF circuits Ieee Transactions On Advanced Packaging. 23: 480-488. DOI: 10.1109/6040.861564  0.417
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