Year |
Citation |
Score |
2014 |
Vamvakos SD, Gauthier CR, Rao C, Wang A, Canagasaby KR, Abugharbieh K, Choudhary P, Dabral S, Desai S, Hassan M, Hsieh KC, Kleveland B, Mandal G, Rouse R, Saraf R, et al. A 2.488-11.2 Gb/s SerDes in 40 nm low-leakage CMOS with multi-protocol compatibility for FPGA applications Analog Integrated Circuits and Signal Processing. 78: 259-273. DOI: 10.1007/S10470-013-0172-1 |
0.345 |
|
2012 |
Vamvakos SD, Gauthier CR, Rao C, Canagasaby KR, Choudhary P, Dabral S, Desai S, Hassan M, Hsieh KC, Kleveland B, Mandal G, Rouse R, Saraf R, Wang A, Yeung J, et al. A 2.488-11.2 Gb/s multi-protocol SerDes in 40nm low-leakage CMOS for FPGA applications Midwest Symposium On Circuits and Systems. 5-8. DOI: 10.1109/MWSCAS.2012.6291943 |
0.365 |
|
2003 |
Johnson M, Al-Shamma A, Bosch D, Crowley M, Farmwald M, Fasoli L, Ilkbahar A, Kleveland B, Lee T, Liu TY, Nguyen Q, Scheuerlein R, So K, Thorp T. 512-Mb PROM with a three-dimensional array of diode/antifuse memory cells Ieee Journal of Solid-State Circuits. 38: 1920-1928. DOI: 10.1109/Jssc.2003.818147 |
0.318 |
|
2003 |
Wong SS, Yue P, Chang R, Kim SY, Kleveland B, O'Mahony F. On-chip interconnect inductance - friend or foe Proceedings - International Symposium On Quality Electronic Design, Isqed. 2003: 389-394. DOI: 10.1109/ISQED.2003.1194764 |
0.355 |
|
2002 |
Kleveland B, Diaz CH, Vook D, Madden L, Lee TH, Wong SS. Correction to "exploiting CMOS reverse interconnect scaling in multigigahertz amplifier and oscillator design" Ieee Journal of Solid-State Circuits. 37: 255-255. DOI: 10.1109/Jssc.2002.982433 |
0.373 |
|
2002 |
Kleveland B, Qi X, Madden L, Furusawa T, Dutton RW, Horowitz MA, Simon Wong S. High-frequency characterization of on-chip digital interconnects Ieee Journal of Solid-State Circuits. 37: 716-725. DOI: 10.1109/Jssc.2002.1004576 |
0.379 |
|
2001 |
Kleveland B, Diaz CH, Vook D, Madden L, Lee TH, Wong SS. Exploiting CMOS reverse interconnect scaling in multigigahertz amplifier and oscillator design Ieee Journal of Solid-State Circuits. 36: 1480-1488. DOI: 10.1109/4.953476 |
0.449 |
|
2000 |
Kleveland B, Maloney TJ, Morgan I, Madden L, Lee TH, Wong SS. Distributed ESD protection for high-speed integrated circuits Ieee Electron Device Letters. 21: 390-392. DOI: 10.1109/55.852960 |
0.369 |
|
2000 |
Qi X, Kleveland B, Yu Z, Wong S, Dutton R, Young T. On-chip inductance modeling of VLSI interconnects Digest of Technical Papers - Ieee International Solid-State Circuits Conference. 172-173. |
0.414 |
|
Low-probability matches (unlikely to be authored by this person) |
1992 |
Dobbelaere I, El Gamal A, How D, Kleveland B. Field programmable MCM systems - Design of an interconnection frame Proceedings of the Custom Integrated Circuits Conference. DOI: 10.1109/CICC.1992.591113 |
0.297 |
|
1989 |
Elewa T, Kleveland B, Boukriss B, Ouisse T, Chovet A, Cristoloveanu S, Davis J. Novel investigation of edge effects in SIMOX transistors . 35-36. |
0.276 |
|
2003 |
Crowley M, Al-Shamma A, Bosch D, Farmwald M, Fasoli L, Ilkbahar A, Johnson M, Kleveland B, Lee T, Liu TY, Nguyen Q, Scheuerlein R, So K, Thorp T. 512Mb PROM with 8 layers of antifuse/diode cells Digest of Technical Papers - Ieee International Solid-State Circuits Conference. |
0.241 |
|
2013 |
Kleveland B, Miller MJ, David RB, Patel J, Chopra R, Sikdar DK, Kumala J, Vamvakos SD, Morrison M, Liu M, Balachandran J. An intelligent RAM with serial I/Os Ieee Micro. 33: 56-65. DOI: 10.1109/Mm.2013.7 |
0.213 |
|
1992 |
Elewa T, Kleveland B, Cristoloveanu S, Boukriss B, Chovet A. Detailed Analysis of Edge Effects in SIMOX-MOS Transistors Ieee Transactions On Electron Devices. 39: 874-882. DOI: 10.1109/16.127478 |
0.209 |
|
2000 |
Iverson RB, Le Coz YL, Kleveland B, Wong SS. Multi-scale Random-Walk thermal-analysis methodology for complex IC-interconnect systems International Conference On Simulation of Semiconductor Processes and Devices, Sispad. 84-86. |
0.2 |
|
1989 |
Elewa T, Kleveland B, Boukriss B, Ouisse T, Chovet A, Cristoloveanu S. Novel electrical characterization of edge effects in SIMOX transistors European Solid-State Device Research Conference. 751-754. |
0.176 |
|
1992 |
Cvetkovic SR, Balachandran W, Kleveland B, Arnold P, Wilson G. A study of nozzle extraction geometry of a liquid metal atomizer using computer simulation of electric fields Conference Record - Ias Annual Meeting (Ieee Industry Applications Society). 1992: 1521-1526. DOI: 10.1109/IAS.1992.244385 |
0.136 |
|
1996 |
Cvetkovic SR, Balachandran W, Kleveland B, Arnold PG, Graham Wilson F, Zhao AP. Nozzle extraction geometry of a liquid metal atomizer optimized by computer simulation of electric fields Ieee Transactions On Industry Applications. 32: 844-850. DOI: 10.1109/28.511640 |
0.132 |
|
1991 |
Balachandran W, Cvetkovic SR, Kleveland B. Computer aided design optimization of nozzle extractor geometry in a liquid metal atomizer Institute of Physics Conference Series. 287-292. |
0.119 |
|
1990 |
Kleveland B, Cristoloveanu S, Sicart J. Novel hall effect spectroscopy of impurity levels in semiconductors Solid State Electronics. 33: 743-752. DOI: 10.1016/0038-1101(90)90188-K |
0.107 |
|
1991 |
Kleveland B, Cristoloveanu S, Sicart J. Reply to "Comments on 'novel Hall effect spectroscopy of impurity levels in semiconductors'", Solid State Electronics. 34: 1311. DOI: 10.1016/0038-1101(91)90073-8 |
0.051 |
|
2014 |
Kleveland B, Choi J, Kumala J, Adam P, Chen P, Chopra R, Cruz A, David R, Dixit A, Doluca S, Hendrickson M, Lee B, Liu M, Miller MJ, Morrison M, et al. Early detection and repair of VRT and aging DRAM bits by margined in-field BIST Ieee Symposium On Vlsi Circuits, Digest of Technical Papers. DOI: 10.1109/VLSIC.2014.6858414 |
0.041 |
|
2012 |
Vamvakos SD, Kleveland B, Sikdar D, Ahuja BK, Lin H, Balachandran J, Balakrishnan W, Bottelli A, Chen J, Chen X, Choi J, Chopra R, Dabral S, Dasari K, David R, et al. A 576 Mb DRAM with 16-channel 10.3125Gbps serial I/O and 14.5 ns latency European Solid-State Circuits Conference. 458-461. DOI: 10.1109/ESSCIRC.2012.6341354 |
0.015 |
|
Hide low-probability matches. |