☰

Swaroop Ghosh, Ph.D. - Publications

Affiliations: 
2008 Electrical and Computer Engineering Purdue University, West Lafayette, IN, United States 
Area:
Electronics and Electrical Engineering
Tree Info Similar researchers PubMed Report error

43 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2020 Khan MNI, De A, Ghosh S. Cache-Out: Leaking Cache Memory Using Hardware Trojan Ieee Transactions On Very Large Scale Integration Systems. 28: 1461-1470. DOI: 10.1109/Tvlsi.2020.2982188  0.396
2020 De A, Khan MNI, Nagarajan K, Ghosh S. HarTBleed: Using Hardware Trojans for Data Leakage Exploits Ieee Transactions On Very Large Scale Integration Systems. 28: 968-979. DOI: 10.1109/Tvlsi.2019.2961358  0.376
2020 Jang J, De A, Vontela D, Nirmala I, Ghosh S, Iyengar A. Threshold-Defined Logic and Interconnect for Protection Against Reverse Engineering Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 39: 308-320. DOI: 10.1109/Tcad.2018.2887056  0.399
2020 Chung J, Choi W, Park J, Ghosh S. Domain Wall Memory-Based Design of Deep Neural Network Convolutional Layers Ieee Access. 8: 19783-19798. DOI: 10.1109/Access.2020.2968081  0.522
2019 Chattopadhyay A, Ghosh S, Burleson W, Mukhopadhyay D. Guest Editorial Special Section on Security Challenges and Solutions With Emerging Computing Technologies Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 27: 2469-2472. DOI: 10.1109/Tvlsi.2019.2945850  0.327
2019 Khan MNI, Ghosh S. Test Methodologies and Test-Time Compression for Emerging Non-Volatile Memory Ieee Transactions On Reliability. 1-11. DOI: 10.1109/Tr.2019.2919466  0.393
2019 Saki AA, Khan MNI, Ghosh S. Reconfigurable and Dense Analog Circuit Design using Two Terminal Resistive Memory Ieee Transactions On Emerging Topics in Computing. 1-1. DOI: 10.1109/Tetc.2019.2938440  0.345
2019 Motaman S, Ghosh S, Rathi N. Cache Bypassing and Checkpointing to Circumvent Data Security Attacks on STTRAM Ieee Transactions On Emerging Topics in Computing. 7: 262-270. DOI: 10.1109/Tetc.2017.2653813  0.347
2019 Govindaraj R, Ghosh S, Katkoori S. Design, Analysis and Application of Embedded Resistive RAM based Strong Arbiter PUF Ieee Transactions On Dependable and Secure Computing. 1-1. DOI: 10.1109/Tdsc.2018.2866425  0.415
2019 Saki AA, Lin SH, Alam M, Thirumala SK, Gupta SK, Ghosh S. A Family of Compact Non-Volatile Flip-Flops With Ferroelectric FET Ieee Transactions On Circuits and Systems I: Regular Papers. 66: 4219-4229. DOI: 10.1109/Tcsi.2019.2927347  0.54
2019 Rangachar Srinivasa S, Ramanathan AK, Li X, Chen W, Gupta SK, Chang M, Ghosh S, Sampson J, Narayanan V. ROBIN: Monolithic-3D SRAM for Enhanced Robustness with In-Memory Computation Support Ieee Transactions On Circuits and Systems I: Regular Papers. 66: 2533-2545. DOI: 10.1109/Tcsi.2019.2897497  0.56
2019 Shin D, Choi W, Park J, Ghosh S. Sensitivity-Based Error Resilient Techniques With Heterogeneous Multiply–Accumulate Unit for Voltage Scalable Deep Neural Network Accelerators Ieee Journal On Emerging and Selected Topics in Circuits and Systems. 9: 520-531. DOI: 10.1109/Jetcas.2019.2933862  0.522
2019 Motaman S, Ghosh S, Park J. A Perspective on Test Methodologies for Supervised Machine Learning Accelerators Ieee Journal On Emerging and Selected Topics in Circuits and Systems. 9: 562-569. DOI: 10.1109/Jetcas.2019.2933678  0.5
2019 Zhang W, Jiao Y, Wu D, Srinivasa S, De A, Ghosh S, Liu P. Armor plc: A platform for cyber security threats assessments for PLCs Procedia Manufacturing. 39: 270-278. DOI: 10.1016/J.Promfg.2020.01.334  0.312
2018 Motaman S, Ghosh S, Kulkarni J. Impact of Process Variation on Self-Reference Sensing Scheme and Adaptive Current Modulation for Robust STTRAM Sensing Acm Journal On Emerging Technologies in Computing Systems. 14: 1-17. DOI: 10.1145/3132577  0.66
2018 Govindaraj R, Ghosh S, Katkoori S. CSRO-Based Reconfigurable True Random Number Generator Using RRAM Ieee Transactions On Very Large Scale Integration Systems. 26: 2661-2670. DOI: 10.1109/Tvlsi.2018.2823274  0.342
2018 Khan MNI, Iyengar AS, Ghosh S. Novel Magnetic Burn-In for Retention and Magnetic Tolerance Testing of STTRAM Ieee Transactions On Very Large Scale Integration Systems. 26: 1508-1517. DOI: 10.1109/Tvlsi.2018.2820508  0.335
2018 Ghosh S, Jha R, Iyengar A, Govindaraj R. Design Space Exploration for Selector Diode-STTRAM Crossbar Arrays Ieee Transactions On Magnetics. 54: 2810185. DOI: 10.1109/Tmag.2018.2810185  0.407
2018 Motaman S, Ghosh S, Kulkarni JP. VFAB: A Novel 2-Stage STTRAM Sensing Using Voltage Feedback and Boosting Ieee Transactions On Circuits and Systems I: Regular Papers. 65: 1919-1928. DOI: 10.1109/Tcsi.2017.2766058  0.694
2017 Govindaraj R, Ghosh S. Design and Analysis of STTRAM-Based Ternary Content Addressable Memory Cell Acm Journal On Emerging Technologies in Computing Systems. 13: 52. DOI: 10.1145/3060578  0.439
2016 Kumar V, Chattopadhyay A, Ghosh S, Irfan M, Chakraborty N, Chakraborty S, Datta A. Improving nutritional quality and fungal tolerance in soya bean and grass pea by expressing an oxalate decarboxylase. Plant Biotechnology Journal. PMID 26798990 DOI: 10.1111/pbi.12503  0.458
2016 Iyengar A, Ghosh S, Srinivasan S. Retention Testing Methodology for STTRAM Ieee Design and Test. 33: 7-15. DOI: 10.1109/Mdat.2016.2591554  0.37
2016 Ghosh S, Iyengar A, Motaman S, Govindaraj R, Jang JW, Chung J, Park J, Li X, Joshi R, Somasekhar D. Overview of Circuits, Systems, and Applications of Spintronics Ieee Journal On Emerging and Selected Topics in Circuits and Systems. 6: 265-268. DOI: 10.1109/Jetcas.2016.2601310  0.529
2016 Ghosh S, Joshi RV, Somasekhar D, Li X. Guest Editorial Emerging Memories—Technology, Architecture and Applications (Second Issue) Ieee Journal On Emerging and Selected Topics in Circuits and Systems. 6: 105-108. DOI: 10.1109/Jetcas.2016.2571858  0.378
2015 Motaman S, Ghosh S. Adaptive Write and Shift Current Modulation for Process Variation Tolerance in Domain Wall Caches Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. DOI: 10.1109/Tvlsi.2015.2437283  0.434
2015 Motaman S, Iyengar AS, Ghosh S. Domain Wall Memory-Layout, Circuit and Synergistic Systems Ieee Transactions On Nanotechnology. 14: 282-291. DOI: 10.1109/Tnano.2015.2391185  0.455
2015 Chung J, Ramclam K, Park J, Ghosh S. Exploiting Serial Access and Asymmetric Read/Write of Domain Wall Memory for Area and Energy-Efficient Digital Signal Processor Design Ieee Transactions On Circuits and Systems I: Regular Papers. DOI: 10.1109/Tcsi.2015.2497558  0.545
2015 Iyengar AS, Ghosh S, Jang JW. MTJ-Based State Retentive Flip-Flop with Enhanced-Scan Capability to Sustain Sudden Power Failure Ieee Transactions On Circuits and Systems I: Regular Papers. 62: 2062-2068. DOI: 10.1109/Tcsi.2015.2440738  0.459
2015 Ghosh S, Basak A, Bhunia S. How secure are printed circuit boards Trojan attacks? Ieee Design and Test. 32: 7-16. DOI: 10.1109/Mdat.2014.2347918  0.566
2015 Hamzaoglu F, Arslan U, Bisnik N, Ghosh S, Lal MB, Lindert N, Meterelliyoz M, Osborne RB, Park J, Tomishima S, Wang Y, Zhang K. A 1 Gb 2 GHz 128 GB/s bandwidth embedded DRAM in 22 nm tri-gate CMOS technology Ieee Journal of Solid-State Circuits. 50: 150-157. DOI: 10.1109/Jssc.2014.2353793  0.719
2015 Iyengar AS, Ghosh S, Ramclam K. Domain Wall Magnets for Embedded Memory and Hardware Security Ieee Journal On Emerging and Selected Topics in Circuits and Systems. DOI: 10.1109/Jetcas.2015.2398232  0.393
2014 Ghosh S. Modeling of Retention Time for High-Speed Embedded Dynamic Random Access Memories Ieee Transactions On Circuits and Systems. 61: 2596-2604. DOI: 10.1109/Tcsi.2014.2312481  0.403
2011 Ghosh S, Roy K. Novel Low Overhead Post-Silicon Self-Correction Technique for Parallel Prefix Adders Using Selective Redundancy and Adaptive Clocking Ieee Transactions On Very Large Scale Integration Systems. 19: 1504-1507. DOI: 10.1109/Tvlsi.2010.2051169  0.511
2010 Ghosh S, Mohapatra D, Karakonstantis G, Roy K. Voltage scalable high-speed robust hybrid arithmetic units using adaptive clocking Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 18: 1301-1309. DOI: 10.1109/Tvlsi.2009.2022531  0.731
2010 Ndai P, Rafique N, Thottethodi M, Ghosh S, Bhunia S, Roy K. Trifecta: A nonspeculative scheme to exploit common, data-dependent subcritical paths Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 18: 53-65. DOI: 10.1109/Tvlsi.2008.2007491  0.711
2007 Ghosh S, Bhunia S, Roy K. Low-Power and testable circuit synthesis using Shannon decomposition Acm Transactions On Design Automation of Electronic Systems. 12: 47. DOI: 10.1145/1278349.1278360  0.639
2007 Ghosh S, Bhunia S, Roy K. CRISTA: A New Paradigm for Low-Power, Variation-Tolerant, and Adaptive Circuit Synthesis Using Critical Path Isolation Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 26: 1947-1956. DOI: 10.1109/Tcad.2007.896305  0.68
2006 Ghosh S, Bhunia S, Raychowdhury A, Roy K. A novel delay fault testing methodology using low-overhead built-in delay sensor Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 25: 2934-2943. DOI: 10.1109/Tcad.2006.882523  0.675
2005 Narayanan V, Ghosh S, Jone W-, Das SR. A built-in self-testing method for embedded multiport memory arrays Ieee Transactions On Instrumentation and Measurement. 54: 1721-1738. DOI: 10.1109/Tim.2005.855093  0.38
2004 Dasmahapatra GP, Didolkar P, Alley MC, Ghosh S, Sausville EA, Roy KK. In vitro combination treatment with perifosine and UCN-01 demonstrates synergism against prostate (PC-3) and lung (A549) epithelial adenocarcinoma cell lines. Clinical Cancer Research : An Official Journal of the American Association For Cancer Research. 10: 5242-52. PMID 15297428 DOI: 10.1158/1078-0432.CCR-03-0534  0.325
2003 Jiang JH, Jone W-, Chang S, Ghosh S. Embedded core test generation using broadcast test architecture and netlist scrambling Ieee Transactions On Reliability. 52: 435-443. DOI: 10.1109/Tr.2003.821931  0.317
1996 Sardar S, Chatterjee M, Ghosh S, Roy K. Role of vitamin D3 on the activity patterns of hepatic drug metabolizing enzymes in transplantable murine lymphoma. Cancer Investigation. 14: 328-34. PMID 8689427  0.304
1995 Chakraborty A, Ghosh R, Roy K, Ghosh S, Chowdhury P, Chatterjee M. Vanadium: a modifier of drug-metabolizing enzyme patterns and its critical role in cellular proliferation in transplantable murine lymphoma. Oncology. 52: 310-4. PMID 7777245 DOI: 10.1159/000227480  0.304
Show low-probability matches.