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Minjian Liu, Ph.D.

Affiliations: 
2007 University of California, San Diego, La Jolla, CA 
Area:
Electronics and Electrical Engineering
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Yuan Taur grad student 2007 UCSD
 (10-nm CMOS: A design study on technology requirement with power/performance assessment.)

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Publications

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Yu B, Lu H, Liu M, et al. (2007) Explicit Continuous Models for Double-Gate and Surrounding-Gate MOSFETs Ieee Transactions On Electron Devices. 54: 2715-2722
Liu M, Cai M, Yu B, et al. (2006) Effect of Gate Overlap and Source/Drain Doping Gradient on 10-nm CMOS Performance Ieee Transactions On Electron Devices. 53: 3146-3149
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