Daniel Gajski

Affiliations: 
University of California, Irvine, Irvine, CA 
Area:
Computer Science
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"Daniel Gajski"

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Nikil Dutt grad student
En-Shou Chang grad student 2000 UC Irvine
Nong Fan grad student 2000 UC Irvine
Lukai Cai grad student 2004 UC Irvine
Andreas Gerstlauer grad student 2004 UC Irvine
Junyu Peng grad student 2004 UC Irvine
Dongwan Shin grad student 2004 UC Irvine
Samar Abdi grad student 2005 UC Irvine
Shuqing Zhao grad student 2005 UC Irvine
Bita GorjiAra grad student 2007 UC Irvine
Mohammad Reshadi grad student 2007 UC Irvine
Hansu Cho grad student 2009 UC Irvine
Lucky L. Yu Lo grad student 2009 UC Irvine
Yonghyun Hwang grad student 2010 UC Irvine
Kyoungwon Kim grad student 2014 UC Irvine
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Publications

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Kim K, Gajski DD. (2014) Hierarchy-Aware mapping of pipelined applications Midwest Symposium On Circuits and Systems. 631-634
Kim K, Gajski DD. (2014) Trace-Driven Performance Estimation of multi-core platforms Midwest Symposium On Circuits and Systems. 627-630
Dang QV, Gajski DD. (2014) Bringing in-class online - A hybrid solution Proceedings of the 4th Interdisciplinary Engineering Design Education Conference, Iedec 2014. 12-17
Gajski D, Austin T, Svoboda S. (2010) What input-language is the best choice for high level synthesis (HLS)? Proceedings - Design Automation Conference. 857-858
Viskic I, Yu L, Gajski D. (2010) Design exploration and automatic generation of MPSoC platform TLMs from Kahn Process Network applications Proceedings of the Acm Sigplan Conference On Languages, Compilers, and Tools For Embedded Systems (Lctes). 77-84
Trajkovic J, Gajski DD. (2010) Early performance-cost estimation of application-specific data path pipelining Proceedings of the 2010 Ieee 8th Symposium On Application Specific Processors, Sasp'10. 107-110
Abdi S, Gajski DD, Viskic I. (2009) Model based synthesis of embedded software Journal of Software. 4: 717-727
Yu Lo LLC, Abdi S, Gajski D. (2009) Transaction level model automation for multicore systems Behavioral Modeling For Embedded Systems and Technologies: Applications For Design and Implementation. 271-289
Coussy P, Gajski DD, Meredith M, et al. (2009) An introduction to high-level synthesis Ieee Design and Test of Computers. 26: 8-17
Gajski D, Abdi S. (2009) Transaction-level system modeling Practical Design Verification. 51-91
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