Xiaoliang Bai, Ph.D.
Affiliations: | 2003 | University of California, San Diego, La Jolla, CA |
Area:
Electronics and Electrical EngineeringGoogle:
"Xiaoliang Bai"Parents
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Publications
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| Zhao C, Bai X, Dey S. (2007) Evaluating Transient Error Effects in Digital Nanometer Circuits Ieee Transactions On Reliability. 56: 381-391 |
| Zhao C, Dey S, Bai X. (2005) Soft-spot analysis: targeting compound noise effects in nanometer circuits Ieee Design & Test of Computers. 22: 362-375 |
| Bai X, Dey S. (2004) High-level crosstalk defect Simulation methodology for system-on-chip interconnects Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 23: 1355-1361 |
| Bai X, Chandra R, Dey S, et al. (2004) Interconnect coupling-aware driver modeling in static noise analysis for nanometer circuits Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 23: 1256-1263 |
| Chen L, Bai X, Dey S. (2002) Testing for Interconnect Crosstalk Defects Using On-Chip Embedded Processor Cores Journal of Electronic Testing. 18: 529-538 |