Hailin Jiang, D.Eng.
Affiliations: | 2007 | Electrical & Computer Engineering | University of California, Santa Barbara, Santa Barbara, CA, United States |
Area:
Electronics and Electrical EngineeringGoogle:
"Hailin Jiang"Parents
Sign in to add mentorMalgorzata Marek-Sadowska | grad student | 2007 | UC Santa Barbara | |
(Analysis and design methodology for power gating in VLSI circuits.) |
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Publications
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Wang K, Ran Y, Jiang H, et al. (2005) General skew constrained clock network sizing based on sequential linear programming Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 24: 773-781 |