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Cheng K. Koh

Affiliations:

Electrical and Computer Engineering

Purdue University, West Lafayette, IN, United States

Area:

Electronics and Electrical Engineering

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Parents

Children

Qing Su	grad student	2002	Purdue
Aiqun Cao	grad student	2004	Purdue
Ruibing Lu	grad student	2004	Purdue
Wai-Ching D. Lam	grad student	2006	Purdue
Jitesh Jain	grad student	2007	Purdue
Stephen Cauley	grad student	2009	Purdue
Kalliopi Tsota	grad student	2011	Purdue
Ruilin Wang	grad student	2011	Purdue
Shuai Li	grad student	2014	Purdue

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Publications

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Ewetz R, Koh C. (2019) Scalable Construction of Clock Trees With Useful Skew and High Timing Quality Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 38: 1161-1174
Ewetz R, Koh C. (2017) Fast clock scheduling and an application to clock tree synthesis Integration. 56: 115-127
Ewetz R, Koh CK. (2016) Construction of reconfigurable clock trees for MCMM designs using mode separation and scenario compression Acm Transactions On Design Automation of Electronic Systems. 21
Ewetz R, Koh CK. (2015) Cost-Effective Robustness in Clock Networks Using Near-Tree Structures Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 34: 515-528
Li S, Koh CK. (2014) MIP-based detailed placer for mixed-size circuits Proceedings of the International Symposium On Physical Design. 11-18
Lee J, Balakrishnan V, Koh C, et al. (2014) A Linear-Complexity Finite-Element-Based Eigenvalue Solver for Efficient Analysis of 3-D On-Chip Integrated Circuits Ieee Microwave and Wireless Components Letters. 24: 833-835
Li S, Koh CK. (2014) Analytical placement of mixed-size circuits for better detailed-routability Proceedings of the Asia and South Pacific Design Automation Conference, Asp-Dac. 41-46
Chen Y, Wong WF, Li H, et al. (2013) On-chip caches built on multilevel spin-transfer torque RAM cells and its optimizations Acm Journal On Emerging Technologies in Computing Systems. 9
Hu J, Koh CK. (2013) Guest editorial: Special section on cross-domain physical optimization Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 32: 173-174
Tsota K, Koh CK, Balakrishnan V. (2012) A size scaling approach for mixed-size placement Proceedings of the International Symposium On Physical Design. 201-205

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