Baris Arslan, Ph.D.
Affiliations: | 2013 | Computer Science and Engineering | University of California, San Diego, La Jolla, CA |
Area:
Computer Science, Computer EngineeringGoogle:
"Baris Arslan"Parents
Sign in to add mentorAlex Orailoglu | grad student | 2013 | UCSD | |
(Adaptive Test Cost and Quality Optimization Through An Effective Yet Efficient Delivery of Chip Specific Tests.) |
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Publications
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Arslan B, Orailoglu A. (2016) Aggressive Test Cost Reductions Through Continuous Test Effectiveness Assessment Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 35: 2093-2103 |
Arslan B, Orailoglu A. (2016) Power-Aware Delay Test Quality Optimization for Multiple Frequency Domains Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 35: 141-154 |
Arslan B, Orailoglu A. (2013) Tracing the best test mix through multi-variate quality tracking Proceedings of the Ieee Vlsi Test Symposium |
Arslan B, Orailoglu A. (2013) Full exploitation of process variation space for continuous delivery of optimal delay test quality Proceedings of the Asia and South Pacific Design Automation Conference, Asp-Dac. 552-557 |
Arslan B, Orailoglu A. (2012) Delay test resource allocation and scheduling for multiple frequency domains Proceedings of the Ieee Vlsi Test Symposium. 114-119 |
Arslan B, Orailoglu A. (2011) Adaptive test framework for achieving target test quality at minimal cost Proceedings of the Asian Test Symposium. 323-328 |
Arslan B, Orailoglu A. (2011) Adaptive test optimization through real time learning of test effectiveness Proceedings -Design, Automation and Test in Europe, Date. 1430-1435 |
Arslan B, Orailoglu A. (2010) Delay test quality maximization through process-aware selection of test set size Proceedings - Ieee International Conference On Computer Design: Vlsi in Computers and Processors. 390-395 |
Arslan B, Orailoglu A. (2004) Circularscan: A scan architecture for test cost reduction Proceedings - Design, Automation and Test in Europe Conference and Exhibition. 2: 1290-1295 |
Arslan B, Orailoglu A. (2004) Test cost reduction through a reconfigurable scan architecture Proceedings - International Test Conference. 945-952 |