Sankaran Jayanarayanan, Ph.D.

Affiliations: 
2004 University of Texas at Austin, Austin, Texas, U.S.A. 
Area:
Electronics and Electrical Engineering
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"Sankaran Jayanarayanan"

Parents

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Sanjay K. Banerjee grad student 2004 UT Austin
 (Silicon-based vertical MOSFETs.)
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Publications

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Jayanarayanan SK, Dey S, Donnelly JP, et al. (2006) A novel 50 nm vertical MOSFET with a dielectric pocket Solid-State Electronics. 50: 897-900
Chen X, Liu KC, Ouyang QC, et al. (2001) Hole and electron mobility enhancement in strained SiGe vertical MOSFETs Ieee Transactions On Electron Devices. 48: 1975-1980
Chen X, Liu KC, Jayanarayanan SK, et al. (2001) Electron mobility enhancement in strained SiGe vertical n-type metal-oxide-semiconductor field-effect transistors Applied Physics Letters. 78: 377-379
Chen X, Ouyang Q, Jayanarayanan SK, et al. (2001) Asymmetric Si/Si1-xGex channel vertical p-type metal-oxide-semiconductor field-effect transistor Solid-State Electronics. 45: 281-285
Chen X, Ouyang Q, Jayanarayanan SK, et al. (2001) Si1-xGex channel vertical PMOSFET with asymmetric Ge profile Annual Device Research Conference Digest. 30-31
Chen X, Ouyang Q, Onsongo DM, et al. (2000) SiGe heterojunction vertical p-type metal-oxide-semiconductor field-effect transistors with Si cap Applied Physics Letters. 77: 1656-1658
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