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Michail Maniatakos, Ph.D. - Publications

Affiliations: 
2007-2012 Electrical Engineering Yale University, New Haven, CT 
 2012- Electrical and Computer Engineering New York University, New York, NY, United States 
Area:
Security
Website:
https://nyuad.nyu.edu/en/academics/divisions/engineering/faculty/michail-maniatakos.html
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34 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2020 Chielle E, Tsoutsos NG, Mazonka O, Maniatakos M. Encrypt-Everything-Everywhere: ISA Extensions for Private Computation Ieee Transactions On Dependable and Secure Computing. 1-1. DOI: 10.1109/Tdsc.2020.3007066  0.313
2020 Tychalas D, Keliris A, Maniatakos M. Stealthy Information Leakage Through Peripheral Exploitation in Modern Embedded Systems Ieee Transactions On Device and Materials Reliability. 20: 308-318. DOI: 10.1109/Tdmr.2020.2994016  0.372
2020 Mazonka O, Sarkar E, Chielle E, Tsoutsos NG, Maniatakos M. Practical Data-in-Use Protection Using Binary Decision Diagrams Ieee Access. 8: 23847-23862. DOI: 10.1109/Access.2020.2970120  0.396
2019 Konstantinou C, Maniatakos M. A Data-Based Detection Method Against False Data Injection Attacks Ieee Design & Test of Computers. 1-1. DOI: 10.1109/Mdat.2019.2952357  0.705
2018 Tsoutsos NG, Maniatakos M. Efficient Detection for Malicious and Random Errors in Additive Encrypted Computation Ieee Transactions On Computers. 67: 16-31. DOI: 10.1109/Tc.2017.2722440  0.442
2018 Tsoutsos NG, Maniatakos M. Anatomy of Memory Corruption Attacks and Mitigations in Embedded Systems Ieee Embedded Systems Letters. 10: 95-98. DOI: 10.1109/Les.2018.2829777  0.326
2018 Mouris D, Tsoutsos NG, Maniatakos M. TERMinator Suite: Benchmarking Privacy-Preserving Architectures Ieee Computer Architecture Letters. 17: 122-125. DOI: 10.1109/Lca.2018.2812814  0.411
2017 Giraldo J, Sarkar E, Cardenas AA, Maniatakos M, Kantarcioglu M. Security and Privacy in Cyber-Physical Systems: A Survey of Surveys Ieee Design & Test of Computers. 34: 7-17. DOI: 10.1109/Mdat.2017.2709310  0.318
2017 Maniatakos M, Cardenas AA, Karri R. Guest Editors’ Introduction: Cyber-Physical Systems Security and Privacy Ieee Design & Test. 34: 5-6. DOI: 10.1109/Mdat.2017.2705028  0.314
2016 Mazonka O, Tsoutsos NG, Maniatakos M. Cryptoleq: A Heterogeneous Abstract Machine for Encrypted and Unencrypted Computation Ieee Transactions On Information Forensics and Security. 11: 2123-2138. DOI: 10.1109/Tifs.2016.2569062  0.382
2016 Tsoutsos NG, Maniatakos M. Obfuscated arbitrary computation using cryptographic primitives Proceeding of 2015 10th International Design and Test Symposium, Idt 2015. 5-8. DOI: 10.1109/Idt.2015.7396726  0.382
2016 Wang X, Konstantinou C, Maniatakos M, Karri R. ConFirm: Detecting firmware modifications in embedded systems using Hardware Performance Counters 2015 Ieee/Acm International Conference On Computer-Aided Design, Iccad 2015. 544-551. DOI: 10.1109/ICCAD.2015.7372617  0.333
2015 Maniatakos M, Michael MK, Makris Y. Multiple-Bit Upset Protection in Microprocessor Memory Arrays Using Vulnerability-Based Parity Optimization and Interleaving Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 23: 2447-2460. DOI: 10.1109/Tvlsi.2014.2365032  0.631
2015 Tsoutsos NG, Maniatakos M. Extending residue-based fault tolerance to encrypted computation Proceedings - International Test Conference. 2015. DOI: 10.1109/TEST.2015.7342419  0.434
2015 Tsoutsos NG, Maniatakos M. The HEROIC framework: Encrypted computation without shared keys Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 34: 875-888. DOI: 10.1109/Tcad.2015.2419619  0.411
2015 Maniatakos M, Michael M, Tirumurti C, Makris Y. Revisiting Vulnerability Analysis in Modern Microprocessors Ieee Transactions On Computers. 64: 2664-2674. DOI: 10.1109/Tc.2014.2375232  0.691
2014 Tsoutsos NG, Maniatakos M. Fabrication attacks: Zero-overhead malicious modifications enabling modern microprocessor privilege escalation Ieee Transactions On Emerging Topics in Computing. 2: 81-93. DOI: 10.1109/Tetc.2013.2287186  0.365
2013 Maniatakos M, Kudva P, Fleischer BM, Makris Y. Low-cost concurrent error detection for floating-point unit (FPU) controllers Ieee Transactions On Computers. 62: 1376-1388. DOI: 10.1109/Tc.2012.81  0.636
2013 Maniatakos M, Michael MK, Makris Y. Investigating the limits of AVF analysis in the presence of multiple bit errors Proceedings of the 2013 Ieee 19th International On-Line Testing Symposium, Iolts 2013. 49-54. DOI: 10.1109/IOLTS.2013.6604050  0.643
2013 Karimi N, Maniatakos M, Tirumurti C, Makris Y. On the impact of performance faults in modern microprocessors Journal of Electronic Testing: Theory and Applications (Jetta). 29: 351-366. DOI: 10.1007/S10836-013-5360-5  0.663
2013 Tsoutsos NG, Maniatakos M. Investigating the application of one instruction set computing for encrypted data computation Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). 8204: 21-37. DOI: 10.1007/978-3-642-41224-0_2  0.403
2013 Maniatakos M, Michael MK, Makris Y. AVF-driven parity optimization for MBU protection of in-core memory arrays Proceedings -Design, Automation and Test in Europe, Date. 1480-1485.  0.59
2012 Maniatakos M, Michael MK, Makris Y. Vulnerability-based Interleaving for Multi-Bit Upset (MBU) protection in modern microprocessors Proceedings - International Test Conference. DOI: 10.1109/TEST.2012.6401594  0.636
2012 Maniatakos M, Tirumurti C, Galivanche R, Makris Y. Global Signal Vulnerability (GSV) analysis for selective state element hardening in modern microprocessors Ieee Transactions On Computers. 61: 1361-1370. DOI: 10.1109/Tc.2011.172  0.674
2012 Jin Y, Maniatakos M, Makris Y. Exposing vulnerabilities of untrusted computing platforms Proceedings - Ieee International Conference On Computer Design: Vlsi in Computers and Processors. 131-134. DOI: 10.1109/ICCD.2012.6378629  0.582
2011 Maniatakos M, Makris Y, Kudva P, Fleischer B. Exponent monitoring for low-cost concurrent error detection in FPU control logic Proceedings of the Ieee Vlsi Test Symposium. 235-240. DOI: 10.1109/VTS.2011.5783727  0.607
2011 Maniatakos M, Karimi N, Tirumurti C, Jas A, Makris Y. Instruction-level impact analysis of low-level faults in a modern microprocessor controller Ieee Transactions On Computers. 60: 1260-1273. DOI: 10.1109/Tc.2010.60  0.675
2011 Karimi N, Maniatakos M, Jas A, Tirumurti C, Makris Y. Workload-cognizant concurrent error detection in the scheduler of a modern microprocessor Ieee Transactions On Computers. 60: 1274-1287. DOI: 10.1109/Tc.2010.265  0.703
2011 Maniatakos M, Tirumurti C, Jas A, Makris Y. AVF analysis acceleration via hierarchical fault pruning Proceedings - 16th Ieee European Test Symposium, Ets 2011. 87-92. DOI: 10.1109/ETS.2011.42  0.633
2010 Maniatakos M, Makris Y. Workload-driven selective hardening of control state elements in modern microprocessors Proceedings of the Ieee Vlsi Test Symposium. 159-164. DOI: 10.1109/VTS.2010.5469589  0.661
2009 Maniatakos M, Karimi N, Tirumurti C, Jas A, Makris Y. Instruction-level impact comparison of RT- vs. gate-level faults in a modern microprocessor controller Proceedings of the Ieee Vlsi Test Symposium. 9-14. DOI: 10.1109/VTS.2009.32  0.643
2009 Karimi N, Maniatakos M, Tirumurti C, Jas A, Makris Y. Impact analysis of performance faults in modern microprocessors Proceedings - Ieee International Conference On Computer Design: Vlsi in Computers and Processors. 91-96. DOI: 10.1109/ICCD.2009.5413171  0.649
2008 Karimiy N, Maniatakos M, Jas A, Makris Y. On the Correlation between Controller Faults and Instruction-Level Errors in Modern Microprocessors Proceedings - International Test Conference. DOI: 10.1109/TEST.2008.4700613  0.664
2008 Maniatakos M, Karimi N, Makris Y, Jas A, Tirumurti C. Design and evaluation of a timestamp-based concurrent error detection method (CED) in a modern microprocessor controller Proceedings - Ieee International Symposium On Defect and Fault Tolerance in Vlsi Systems. 454-462. DOI: 10.1109/DFT.2008.59  0.68
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