Sudhakar M. Reddy
Affiliations: | Electrical and Computer Engineering | University of Iowa, Iowa City, IA |
Area:
Electronics and Electrical EngineeringWebsite:
https://www.engineering.uiowa.edu/faculty-staff/sudhakar-m-reddyGoogle:
"Sudhakar M. Reddy"Bio:
https://www.proquest.com/openview/ad5d723a265bf6567872ac3aacb7d393/1
Parents
Sign in to add mentor| John P. Robinson | grad student | 1968 | University of Iowa | |
| (A class of convolution codes and a new decoding algorithm) | ||||
Children
Sign in to add trainee| Dhiraj K. Pradhan | grad student | 1972 | University of Iowa (Computer Science Tree) |
| Ruifeng Guo | grad student | 2000 | University of Iowa |
| Nadir Z. Basturkmen | grad student | 2002 | University of Iowa |
| Xiaogang Du | grad student | 2004 | University of Iowa |
| Huaxing Tang | grad student | 2004 | University of Iowa |
| Narendra Devta Prasanna | grad student | 2006 | University of Iowa |
| Chaowen Yu | grad student | 2006 | University of Iowa |
| Yuan Cai | grad student | 2007 | University of Iowa |
| Santiago Remersaro | grad student | 2008 | University of Iowa |
| Xun Tang | grad student | 2010 | University of Iowa |
| Elham khayat Moghaddam | grad student | 2011 | University of Iowa |
| Xiaoxin Fan | grad student | 2012 | University of Iowa |
| Sharada Jha | grad student | 2013 | University of Iowa |
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Publications
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| Liu Y, Mukherjee N, Rajski J, et al. (2020) Deterministic Stellar BIST for Automotive ICs Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 39: 1699-1710 |
| Kung Y, Lee K, Reddy SM. (2020) Generating Single- and Double-Pattern Tests for Multiple CMOS Fault Models in One ATPG Run Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 39: 1340-1345 |
| Martínez LH, Khursheed S, Reddy SM. (2020) LFSR generation for high test coverage and low hardware overhead Iet Computers and Digital Techniques. 14: 27-36 |
| Wang N, Pomeranz I, Reddy SM, et al. (2019) Layout Resynthesis by Applying Design-for-manufacturability Guidelines to Avoid Low-coverage Areas of a Cell-based Design Acm Transactions On Design Automation of Electronic Systems. 24: 42 |
| Wu C, Lee K, Reddy SM. (2019) An Efficient Diagnosis-Aware ATPG Procedure to Enhance Diagnosis Resolution and Test Compaction Ieee Transactions On Very Large Scale Integration Systems. 27: 2105-2118 |
| Wu C, Lin S, Lee K, et al. (2018) A Repair-for-Diagnosis Methodology for Logic Circuits Ieee Transactions On Very Large Scale Integration Systems. 26: 2254-2267 |
| Burchard J, Erb D, Reddy SM, et al. (2018) On the Generation of Waveform-Accurate Hazard and Charge-Sharing Aware Tests for Transistor Stuck-Off Faults in CMOS Logic Circuits Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 37: 2152-2165 |
| Acero C, Feltham D, Liu Y, et al. (2017) Embedded Deterministic Test Points Ieee Transactions On Very Large Scale Integration Systems. 25: 2949-2961 |
| Kumar A, Kassab M, Moghaddam E, et al. (2015) Isometric Test Data Compression Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 34: 1847-1859 |
| Reddy SM, Zhang Z. (2014) On achieving minimal size test sets for scan designs Information Technology. 56: 150-156 |