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Kartikeya Mayaram - Publications

Affiliations: 
Oregon State University, Corvallis, OR 
Area:
Electronics and Electrical Engineering
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29 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2020 Maghami H, Payandehnia P, Mirzaie H, Zanbaghi R, Zareie H, Goins J, Dey S, Mayaram K, Fiez TS. A Highly Linear OTA-Less 1-1 MASH VCO-Based $\Delta\Sigma$ ADC With an Efficient Phase Quantization Noise Extraction Technique Ieee Journal of Solid-State Circuits. 55: 706-718. DOI: 10.1109/Jssc.2019.2954764  0.46
2019 Mirzaie H, Maghami H, Zanbaghi R, Payandehnia P, Mayaram K, Fiez TS. A 72.4-dB SNDR 92-dB SFDR Blocker Tolerant CT $\Delta\Sigma$ Modulator With Inherent DWA Ieee Transactions On Circuits and Systems Ii-Express Briefs. 66: 347-351. DOI: 10.1109/Tcsii.2018.2852599  0.463
2019 Maghami H, Payandehnia P, Mirzaie H, Zanbaghi R, Dey S, Mayaram K, Fiez TS. A Highly Linear OTA-Free VCO-Based 1-1 MASH $\Delta\Sigma$ ADC Ieee Transactions On Circuits and Systems I-Regular Papers. 66: 2440-2453. DOI: 10.1109/Tcsi.2019.2897785  0.431
2018 Dey S, Reddy K, Mayaram K, Fiez TS. A 50 MHz BW 76.1 dB DR Two-Stage Continuous-Time Delta–Sigma Modulator With VCO Quantizer Nonlinearity Cancellation Ieee Journal of Solid-State Circuits. 53: 799-813. DOI: 10.1109/Jssc.2017.2777455  0.45
2017 Nandwana RK, Saxena S, Elshazly A, Mayaram K, Hanumolu PK. A 1-to-2048 Fully-Integrated Cascaded Digital Frequency Synthesizer for Low Frequency Reference Clocks Using Scrambling TDC Ieee Transactions On Circuits and Systems I-Regular Papers. 64: 283-295. DOI: 10.1109/Tcsi.2016.2609855  0.502
2016 Guha Roy A, Mayaram K, Fiez TS. Fast start-up analysis of resonator based oscillators using a power generation method Iet Circuits, Devices and Systems. 10: 357-364. DOI: 10.1049/Iet-Cds.2015.0299  0.429
2015 Guha Roy A, Dey S, Goins JB, Fiez TS, Mayaram K. 350 mV, 5 GHz Class-D Enhanced Swing Differential and Quadrature VCOs in 65 nm CMOS Ieee Journal of Solid-State Circuits. 50: 1833-1847. DOI: 10.1109/Jssc.2015.2420677  0.512
2015 Roy AG, Mayaram K, Fiez TS. Analysis and design optimization of enhanced swing CMOS LC oscillators based on a phasor based approach Analog Integrated Circuits and Signal Processing. 82: 691-703. DOI: 10.1007/S10470-015-0490-6  0.428
2013 Ni R, Mayaram K, Fiez TS. A 2.4 GHz hybrid polyphase filter based BFSK receiver with high frequency offset tolerance for wireless sensor networks Ieee Journal of Solid-State Circuits. 48: 1250-1263. DOI: 10.1109/Jssc.2013.2247679  0.571
2011 Heiberg AC, Brown TW, Fiez TS, Mayaram K. A 250 mV, 352 μW GPS receiver RF front-end in 130 nm CMOS Ieee Journal of Solid-State Circuits. 46: 938-949. DOI: 10.1109/Jssc.2011.2109470  0.52
2010 Ayers J, Mayaram K, Fiez TS. An ultralow-power receiver for wireless sensor networks Ieee Journal of Solid-State Circuits. 45: 1759-1769. DOI: 10.1109/Jssc.2010.2056850  0.45
2007 Vytyaz I, Lee DC, Hanumolu PK, Moon UK, Mayaram K. Sensitivity analysis for oscillators Ieee/Acm International Conference On Computer-Aided Design, Digest of Technical Papers, Iccad. 458-463. DOI: 10.1109/Tcad.2008.927731  0.336
2006 Wu T, Mayaram K, Moon UK. An on-chip calibration technique for reducing supply voltage sensitivity in ring oscillators Ieee Symposium On Vlsi Circuits, Digest of Technical Papers. 102-103. DOI: 10.1109/Jssc.2007.892194  0.502
2005 Behera M, Kratyuk V, De SK, Aluru NR, Hu Y, Mayaram K. Accurate simulation of RF MEMS VCO performance including phase noise Journal of Microelectromechanical Systems. 14: 313-325. DOI: 10.1109/Jmems.2004.839317  0.648
2004 Hanumolu PK, Brownlee M, Mayaram K, Moon UK. Analysis of charge-pump phase-locked loops Ieee Transactions On Circuits and Systems I: Regular Papers. 51: 1665-1674. DOI: 10.1109/Tcsi.2004.834516  0.367
2003 Xu CG, Fiez TS, Mayaram K. Nonlinear finite element analysis of a thin piezoelectric laminate for micro power generation Journal of Microelectromechanical Systems. 12: 649-655. DOI: 10.1109/Jmems.2003.817896  0.305
2002 Ou Y, Barton N, Fetche R, Seshan N, Fiez T, Moon U, Mayaram K. Phase noise simulation and estimation methods: a comparative study Ieee Transactions On Circuits and Systems Ii: Analog and Digital Signal Processing. 49: 635-638. DOI: 10.1109/Tcsii.2002.806739  0.434
2002 Moon UK, Mayaram K, Stonick JT. Spectral analysis of time-domain phase jitter measurements Ieee Transactions On Circuits and Systems Ii: Analog and Digital Signal Processing. 49: 321-327. DOI: 10.1109/Tcsii.2002.802343  0.304
2001 Kirby RM, Karniadakis GE, Mikulchenko O, Mayaram K. An integrated simulator for coupled domain problems in MEMS Journal of Microelectromechanical Systems. 10: 379-391. DOI: 10.1109/84.946788  0.402
2001 Rasmussen A, Mavriplis C, Zaghloul ME, Mikulchenko O, Mayaram K. Simulation and optimization of a microfluidic flow sensor Sensors and Actuators, a: Physical. 88: 121-132. DOI: 10.1016/S0924-4247(00)00503-3  0.347
2000 Mayaram K, Lee DC, Moinian S, Rich DA, Roychowdhury J. Computer-aided circuit analysis tools for RFIC simulation: algorithms, features, and limitations Ieee Transactions On Circuits and Systems Ii: Analog and Digital Signal Processing. 47: 274-286. DOI: 10.1109/82.839663  0.44
2000 Mayaram K. Output voltage analysis for the MOS Colpitts oscillator Ieee Transactions On Circuits and Systems I-Regular Papers. 47: 260-263. DOI: 10.1109/81.828582  0.423
2000 Tin SF, Osman AA, Mayaram K, Hu C. A Simple Subcircuit Extension of the BSIM3v3 Model for CMOS RF Design Ieee Journal of Solid-State Circuits. 35: 612-623. DOI: 10.1109/4.839921  0.444
1993 Mayaram K, Chern J, Yang P. Algorithms for transient three-dimensional mixed-level circuit and device simulation Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 12: 1726-1733. DOI: 10.1109/43.248083  0.376
1993 Burch R, Yang P, Cox P, Mayaram K. A new matrix solution technique for general circuit simulation Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 12: 225-241. DOI: 10.1109/43.205003  0.366
1992 Mayaram K, Pederson DO. Coupling algorithms for mixed-level circuit and device simulation Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 11: 1003-1012. DOI: 10.1109/43.149771  0.361
1987 Mayaram K, Lee JC, Hu C. A model for the electric field in lightly doped drain structures Ieee Transactions On Electron Devices. 34: 1509-1518. DOI: 10.1109/T-Ed.1987.23113  0.305
1986 Lee J, Mayaram K, Hu C. A theoretical study of gate/Drain offset in LDD MOSFET's Ieee Electron Device Letters. 7: 152-154. DOI: 10.1109/Edl.1986.26328  0.309
1984 Sussman-Fort SE, Mayaram K. On the implementation of general four-terminal DC device models in SPICE Circuits Systems and Signal Processing. 3: 435-445. DOI: 10.1007/Bf01599170  0.373
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