Borivoje Nikolic - US grants

Intellectual Merit

Design in power-limited scaling era. This proposal presents a general framework of minimization of power and energy in digital CMOS integrated circuits. This proposal presents a framework for designing digital circuits to either minimize power/energy dissipation for given performance or maximize the performance under power/energy constraints. The problem is defined at the circuit level, but is also expanded to include the device, microarchitecture and system levels.

This framework will be used in designing signal processing blocks for communications and storage systems. The particular applications targeted are iterative decoders for turbo and low-density parity check decoding.


Broader Impacts

The broader impacts of this proposed project are twofold: 1) to widen the education in digital integrated circuits including power, energy, as well as robustness as key determining variables within digital integrated circuit designs and 2) to include these areas within the revised edition of a widely used textbook in Digital Integrated Circuit. My education plans aim at providing a solid analytical background and design intuition for our students in the design of digital circuits and systems.

This award includes synergistic research in fundamental communications theory and the development of novel communications technologies. To make these research activities possible the principal investigators (PIs) will establish new and enhance the existing research infrastructure for research programs associated with the Center for Information Technology Research in the Interest of Society (CITRIS) and two of its members: the Berkeley Wireless Research Center (BWRC) and the Wireless Foundations Center (WFC). The purpose of this new infrastructure is to build a research environment that enables investigation of novel technologies for cognitive radios, high data rate transmission over wireless local area networks (WLANs), and wireless sensor networks.
The wireless explosion that the researchers are witnessing today can be largely attributed to the availability of unlicensed spectrum bands. New unlicensed bands are being allocated, for example the 5GHz of spectrum available worldwide at 60GHz. At the same time, a large majority of available spectrum is locked in by its pre-allocated use in legacy systems. The PIs will investigate methods of overlaying the legacy systems with new wireless systems, which allow the use of ultra-wideband (UWB) radios to operate in the 3-10GHz band. Simultaneously, the FCC is considering allowing unlicensed 'cognitive' radios to overlay allocated bands, such as TV spectrum overlay.
This award takes a broad and thorough inter-disciplinary approach to developing the fundamental understanding of the operation in new bands, such as 60GHz and UWB, spectrum reuse and spectrum recycling by cognitive radios, together with reducing the requirements of these systems to the basic hardware specifications of the underlying technology.
The researchers are developing a common computational, test and measurement infrastructure that will allow a quantum leap in wireless technology research and its applications. By building a common computational infrastructure, consisting of compute servers, clusters of workstations and FPGA-based emulation, the researchers will foster the propagation of information from theory to prototypes. To fundamentally understand the physical properties of new bands as well as new methods of spectrum utilization and coexistence of various systems, the researchers will make a major investment in test and measurement infrastructure.
Broader Impact. This common infrastructure will support the research of over a hundred graduate students, tens of undergraduate researchers and more than ten faculty. To maximize the impact, in addition to the traditional means of publications, the research results will be disseminated through participation in communications standardization processes, participation in government and NSF-sponsored studies on wireless technology and policies, and industry involvement. Research results will be used to form new graduate and undergraduate courses that will be taught in Berkeley and elsewhere.

The project addresses some of the currently most important basic research challenges in error
control coding theory. The bulk of current theory on efficient decoding methods is asymptotic in nature, and thus does not yield useful predictions for the shorter and intermediate blocklengths needed for delaysensitive applications (e.g., high-speed communications, streaming and peer-to-peer networks). A closely related goal is to gain a deeper understanding the so-called "error floor" behavior exhibited by certain classes of low-density parity check (LDPC) codes. These error floors seriously limit their usefulness for very low bit error rate (BER) applications (e.g., high-speed communications, data storage). A current major bottleneck is the lack of systematic and reliable methods to explore this deep BER regime, and we propose to address this challenge through a combination of combinatorial and geometric analysis, hardware-based emulation,
and fast stochastic simulation.

Intellectual merit: Lack of finite-length analysis and the existence of error floors is a key bottleneck slowing down the deployment of high performance codes in a range of very important applications. Addressing this challenge requires a range of deep and fundamental scientific questions, drawing on ideas from polyhedral combinatorics, graph theory, dynamical systems and probability theory. Hardware implementation of message passing algorithms for high performance applications is in itself challenging. The research uses the development of high performance iterative decoders as a design driver for developing a novel emulation-simulation based design approach. This paradigm is novel and poses many fundamental challenges,
including the development of fast simulation techniques for gathering error statistics, stochastic
adaptive algorithms that exploit error statistics in order to design better codes, and investigation of systematic techniques for efficiently mapping code designs onto a field-programmable gate array (FPGA) platform.

Broader impact: Message-passing algorithms on graphs play a fundamental role across of a broad spectrum of scientific and engineering disciplines. The range of applications covers areas as diverse as communication systems, image processing, bioinformatics, statistical physics, and natural language processing, among many others. Consequently, our research, with its explicit goal of gaining a deeper understanding of message passing algorithms, has the potential for broad impact and dissemination across a variety of areas. In addition, our project has a significant educational and outreach component. Graduate students at Berkeley will be trained in both algorithmic and VLSI design techniques while participating in this research. Students coming our of this program will have a unique skill set that spans both theory and implementation,
thereby constituting an invaluable addition to the nation's technical workforce. We are also very active in promoting undergraduate research and in facilitating research experiences for students from historically underrepresented communities. The overall thrust of this project has many well defined subprojects, which makes it very well-suited to such outreach activity at the undergraduate level.
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Objective:
The objective of this program is to build on the theoretical foundations of cooperative communications, and to develop key components of a communications system that would enable such a system in practice. In particular, the goal is to investigate the detailed implementation of a cooperation technique between the source terminal and multiple relays to increase the capacity of an uplink in the context of WLAN and cellular systems.

Intellectual merit:
The intellectual merit of this program is the development of the theoretical foundation, the necessary system design principles, and the demonstration of a prototype system of cooperative wireless systems that will enable future capacity scaling of wireless communications. The goal of this system will be to achieve a throughput gain in wireless systems that increases with the number of single-hop relays in the system, while maintaining low-complexity operations at each of the relays. The target system will be designed and evaluated on a configurable radio platform.

Broader impacts:
The broader impacts include the development of networks that meet the vision of inexpensive wireless broadband access everywhere as outlined in the National Broadband Plan. Through our industrial relations, the developed technology will be transformed from theory toward a commercial practice, simultaneously providing means for corresponding regulatory and standardization changes. A new generation of engineers will be educated, able to envision, analyze and develop practical wireless communications systems of the future. To broaden the impact, practical applications of our work will be incorporated in graduate curricula and outreach to underrepresented groups.

This project will develop the key technologies needed for interactive wireless applications operating in shared spectrum. Sharing is the new spectrum paradigm, and interactive applications are the most demanding in terms of the quality-of-service they require. Thus, they are the perfect vehicle to push the frontiers of our understanding of sharing. This project will explore new high-reliability coding techniques to protect interactive applications while meeting tight latency constraints and explore how to coexist with neighboring disparate systems through explicit and implicit signaling. The project will contribute the fundamental understanding required to define the correct regulatory structure for spectrum sharing.

Broadly speaking, the interactive applications that this project will study are the key to the next growth phase in commercial wireless - as machines need to interact with each other to improve the performance of real-world systems. Because industrial control is a critical use case, this project can help invigorate the agile manufacturing sector of the economy. Efficiently shared spectrum is much more economical than exclusive-use spectrum and hence could help innovative high-skill manufacturing where the United States has an advantage over low-wage countries. While developing this technology, the project will train students in a way that encourages cross-fertilization of ideas between wireless communication, circuit implementation, control theory, and coding theory. These ideas will be brought into the classroom, including our new M.Eng. courses aimed at educating innovative technical leaders. The project will also broaden participation in the technical workforce by mentoring students from underrepresented groups.

This project aims to explore the fundamental architectural considerations involved in designing/operating wireless networks for fast Machine to Machine (M2M) communication. Current ideas in the M2M space are fundamentally being driven by ``slow M2M'' applications like electricity-monitoring in the Smart Grid with their intellectual foundations coming from the now maturing field of wireless sensor networks. This project advances the field by addressing the high-performance case of industrial automation with tight real-time operating requirements and the demand for very high reliability. To do this, the project will be leveraging new mathematical and conceptual tools developed to understand decentralized control systems as well as modern approaches to doing multiterminal wireless networking that better exploit the full potential of the wireless medium. The techniques used in this project will span networking, control theory, information theory, wireless modeling, signal processing, and circuit implementation.

Broadly speaking, the kind of "Fast M2M" technology that this project is developing has the potential to help invigorate the agile manufacturing sector of the economy. Easily reconfigurable wireless interconnection in the industrial setting could help high-skill manufacturing where the United States has a potential advantage over low-wage countries. In the course of developing this technology, the project will train students and postdocs in a way that encourages cross-fertilization of ideas between wireless communication, networking, circuit implementation, control theory, and information theory. These ideas will also be incorporated into courses, including new M.Eng. courses aimed at educating technical leaders for industry. This is the kind of non-siloed education that is essential for innovation in the future. The project will also broaden participation in the technical workforce by mentoring female graduate students.

Fifth-generation (5G) wireless systems are expected to provide enormous improvements in data rates available to users, as well as much improvement overall user experience. Massive multiple-input multiple-output (MIMO) arrays consist of hundreds of antenna elements, serving many users and are considered to be a cornerstone of 5G wireless systems, and are expected to dramatically improve both the radio spectrum utilization and user experience. At the same time, the use of millimeter-wave (mm-wave) frequencies is supposed to provide additional spectrum for new services in the years to come, and small physical antenna separation makes mm-wave attractive for massive MIMO. While there has been substantial progress in the development of the theoretical concepts associated with the design of massive MIMO systems, very little work has been done to actually design a mm-wave massive MIMO system and on the network techniques needed to scale these systems to dozens of simultaneous spatial streams. This proposal addresses the key challenges in the development of signal processing algorithms, network protocols, and a prototype hardware design to enable scalable low-latency mm-wave MIMO networks with high degrees of spatial multiplexing. It will provide a path to a hundred-fold improvement in user data rates.

By integrating the theoretical system aspects with its practical development, this proposal addresses critical challenges for the development of mm-wave massive MIMO technologies. In particular, this project aims to achieve: (1) a mm-wave massive MIMO array architecture suitable for low-cost and energy-efficient deployment at massive scale, (2) an optimized scalable signal processing approach to massive MIMO array processing, which includes hybrid beamforming, distributed channel estimation and distributed beamforming, (3) a medium-access control (MAC) technique suitable for low-latency, low-coherence time applications by leveraging a full-duplex frame to enable rapid user acquisition, synchronization, tracking, and paging, (4) practical in-band full-duplex operation, realized through a combination of antenna array design, spatial filtering, and adaptive analog and digital cancellation, (5) practical front-end circuits with linearity and phase noise suitable for a large number of simultaneous spatial streams, and (6) a mm-wave massive MIMO test bed designed in a modular manner to enable future development and performance measurements of signal processing and MAC techniques. In addition to cross-disciplinary training of students involved in this project, interaction of project members with industry leaders will dramatically accelerate the penetration of 5G wireless communications.

Advanced computing systems lie at the heart of many innovative products, from intelligent earbuds to autonomous vehicles, and these are increasingly built as customized systems-on-a-chip (SoCs). Customized SoCs incorporate a complex mix of general-purpose and customized processing logic, and both software and hardware must be highly tuned to achieve the needed performance and energy efficiency for the target application. Chipyard combines and extends existing community infrastructure components to provide a rich unified framework for research into SoC architecture and implementation, supporting activities ranging from research into new software and new architecture simulation techniques all the way down to test chip fabrication.

Chipyard is an integrated SoC design, simulation, and implementation environment to support research and development of specialized computing systems required to meet new application demands in the face of the slowdown in technology scaling. Chipyard is based around the widely used Rocket Chip SoC generator, which includes RISC-V processors, coherent caches, interconnect, and other IP blocks written in the Chisel HDL. Due to the widespread adoption of RISC-V in both academia and industry, there is extensive software support both in upstream open-source software projects as well as increasingly from commercial software providers. Chisel has a growing community, with a series of Chisel Community Conferences and multiple commercial tapeouts of Chisel-based designs. Chipyard IP modules can also be imported from legacy HDLs. RTL designs are converted into a common intermediate representation, FIRRTL, which supports powerful circuit transformations and experimentation with new hardware design tools. For fast, accurate simulation, Chipyard generates FireSim cloud-FPGA-accelerated simulators. FireSim can simulate entire datacenter racks at the RTL level with only a 100X slowdown. FireSim includes performance monitoring, analysis, and debugging tools to allow high observability of design behavior while running at high simulation speed. Chipyard also includes FireMarshal, a software workload management system that allows complete workloads to be easily packaged and recompiled to match an SoC configuration and execution environment. Chipyard integrates the Hammer modular physical design flow, which supports plugins for different tool chains and process technologies, and automates many tapeout steps. Chipyard will also integrate the Berkeley Analog Generator for mixed-signal and analog blocks. Overall, Chipyard provides an integrated environment where a single SoC description can be used to drive conventional open-source or commercial software RTL simulators, or pushed all the way to GDSII layout using industry-standard CAD tools and/or open-source ECAD tools once available. This proposal will fund further development of Chipyard capabilities, managed releases, and community engagement and outreach.

This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

Currently deployed fifth generation (5G) solutions operate in frequency bands, mostly below 6 GHz, and to a limited extent at 28/39 GHz, and expansion to other emerging frequency bands is under consideration. When operating at 28 GHz or 39 GHz, hundreds of antennas are needed to boost the power of the transmitted signal to form a focused beam to increase the communication range. On the receiver, there is a unique opportunity to take advantage of the many antenna elements to also cancel out or attenuate interference from unwanted directions. This proposal seeks to understand the most power efficient and optimal means of achieving interference cancellation. Furthermore, as the transition of high-speed applications starts to occur from sub-6 GHz frequency bands to higher frequencies, especially at 28/39 GHz, traditional means of cancelling unwanted interference operating in other frequency bands (other “channels”) using high quality acoustic resonators does not seem viable. As such, this project will explore the application of filters that are electronically tunable and take advantage of the switching properties of modern digital devices as a means of overcoming these limitations. While addressing the coexistence issue is a major hurdle for commercial radios, many other radios are also in danger of losing functionality and sensitivity if steps are not taken to address the problem of interference. Many important sensors, such as weather radars and radio astronomy telescopes, may cease to function if interference levels increase as expected. It is therefore imperative to protect such radios by directly collaborating with the radio astronomy community. This research will also lead to the training of students in the engineering of modern communications systems and wireless communications.
Future generation of radios utilize broader band millimeter-wave (mm-wave) front-ends, higher channel bandwidths (1 GHz or more), and beamforming. Multi antenna array signal processing techniques naturally provide some spatial filtering of unwanted signals. By placing nulls in the antenna pattern to purposefully “zero-out” interference, one can improve signal-to-distortion ratio, achieve better spectrum utilization, and realize more robust radios. While all these benefits can be realized using digital signal processing, the wide dynamic range requirements on the analog-to-digital converter make the hundred element array radio high power and even unfeasible. Furthermore, out-of-band interference will likely pose an issue when the mm-wave spectrum is more crowded. Traditional ways of removing interference using sharp filters based on high-Q resonators is not viable above 10 GHz. To address these issues, interference cancellation will be explored in several locations in the receiver, at the radio frequency itself (using tunable electronic notch filters), at the boundary between radio frequency blocks and analog blocks (spatial notch), as well as inside the analog-to-digital converter itself. In this way, interference will be rejected before (or during) quantization, which will reduce the dynamic range requirements of the receiver greatly. This is especially important at wider channel bandwidths proposed in 5G and future generation radios. Cancellation of interference, though, requires knowledge of the location and frequency of the interfering signal. Digital and baseband tracking loops will be explored to identify the properties of the interfering signal and feedback loops will then allow interference cancellation to be performed in the various forms. Application of these techniques for the protection of passive radio sensors, such as radio astronomy telescopes, will be studied and techniques for interference tracking from the radio astronomy community will be investigated.

This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.