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Chi On Chui, Ph.D.

Affiliations: 
Electrical Engineering University of California, Los Angeles, Los Angeles, CA 
 2004 Stanford University, Palo Alto, CA 
Area:
Semiconductor and electronic devices, integrated circuit manufacturing technology, bioelectronics and medical device technology, heterogeneous integration and exploratory nanotechnology
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"Chi Chui"
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Cross-listing: E-Tree

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Parents

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Krishna C. Saraswat grad student 2004 Stanford
 (Advanced germanium complementary-metal-oxide-semiconductor technologies.)

Children

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Kun-Huan Shih grad student 2012 UCLA

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Publications

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Song L, Gao W, Chui CO, et al. (2019) Wideband Frequency Reconfigurable Patch Antenna With Switchable Slots Based on Liquid Metal and 3-D Printed Microfluidics Ieee Transactions On Antennas and Propagation. 67: 2886-2895
Wang S, Pan A, Grezes C, et al. (2017) Leveraging nMOS Negative Differential Resistance for Low Power, High Reliability Magnetic Memory Ieee Transactions On Electron Devices. 64: 4084-4090
Wang S, Pan A, Chui CO, et al. (2017) Tunneling Negative Differential Resistance-Assisted STT-RAM for Efficient Read and Write Operations Ieee Transactions On Electron Devices. 64: 121-129
Yang Y, Mao Y, Shin KS, et al. (2016) Self-Locking Optoelectronic Tweezers for Single-Cell and Microparticle Manipulation across a Large Area in High Conductivity Media. Scientific Reports. 6: 22630
Wang S, Pan A, Chui CO, et al. (2016) PROCEED: A Pareto Optimization-Based Circuit-Level Evaluator for Emerging Devices Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 24: 192-205
Leung G, Wang S, Pan A, et al. (2015) An Evaluation Framework for Nanotransfer Printing-Based Feature-Level Heterogeneous Integration in VLSI Circuits Ieee Transactions On Very Large Scale Integration (Vlsi) Systems
Leung G, Pan A, Chui CO. (2015) Junctionless silicon and In0.53Ga0.47As transistors - Part II: Device variability from random dopant fluctuation Ieee Transactions On Electron Devices. 62: 3208-3214
Pan A, Leung G, Chui CO. (2015) Junctionless silicon and In0.53Ga0.47As transistors - Part I: Nominal device evaluation with quantum simulations Ieee Transactions On Electron Devices. 62: 3199-3207
Pan A, Chui CO. (2015) Gate-Induced Source Tunneling FET (GISTFET) Ieee Transactions On Electron Devices. 62: 2390-2395
Pan A, Chui CO. (2015) Modeling source-drain tunneling in ultimately scaled III-V transistors Applied Physics Letters. 106
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