Rohit S. Shenoy, Ph.D.
Affiliations: | 2005 | Stanford University, Palo Alto, CA |
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Parents
Sign in to add mentor| Krishna C. Saraswat | grad student | 2005 | Stanford | |
| (Technology and scaling of ultrathin body double -gate FETs.) | ||||
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Publications
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| Padilla A, Burr GW, Shenoy RS, et al. (2015) On the origin of steep i - V nonlinearity in mixed-ionic-electronic-conduction-based access devices Ieee Transactions On Electron Devices. 62: 963-971 |
| Narayanan P, Burr GW, Shenoy RS, et al. (2015) Exploring the design space for crossbar arrays built with mixed-ionic-electronic-conduction (MIEC) access devices Ieee Journal of the Electron Devices Society. 3: 423-434 |
| Narayanan P, Burr GW, Shenoy RS, et al. (2015) Circuit-level benchmarking of access devices for resistive nonvolatile memory arrays Technical Digest - International Electron Devices Meeting, Iedm. 2015: 29.7.1-29.7.4 |
| Burr GW, Shenoy RS, Virwani K, et al. (2014) Access devices for 3D crosspoint memory Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures. 32 |
| Shenoy RS, Burr GW, Virwani K, et al. (2014) MIEC (mixed-ionic-electronic-conduction)-based access devices for non-volatile crossbar memory arrays Semiconductor Science and Technology. 29 |
| Burr GW, Virwani K, Shenoy RS, et al. (2012) Large-scale (512kbit) integration of multilayer-ready access-devices based on Mixed-Ionic-Electronic-Conduction (MIEC) at 100% yield Digest of Technical Papers - Symposium On Vlsi Technology. 41-42 |
| Virwani K, Burr GW, Shenoy RS, et al. (2012) Sub-30nm scaling and high-speed operation of fully-confined Access-Devices for 3D crosspoint memory based on mixed-ionic-electronic-conduction (MIEC) materials Technical Digest - International Electron Devices Meeting, Iedm. 2.7.1-2.7.4 |
| Shenoy RS, Gopalakrishnan K, Jackson B, et al. (2011) Endurance and scaling trends of novel access-devices for multi-layer crosspoint-memory based on mixed-ionic-electronic-conduction (MIEC) materials Digest of Technical Papers - Symposium On Vlsi Technology. 94-95 |
| Burr GW, Breitwisch MJ, Franceschini M, et al. (2010) Phase change memory technology Journal of Vacuum Science and Technology B:Nanotechnology and Microelectronics. 28: 223-262 |
| Schmid GM, Khusnatdinov N, Brooks CB, et al. (2008) Controlling linewidth roughness in step and flash imprint lithography Proceedings of Spie - the International Society For Optical Engineering. 6792 |