Seok-Hee Lee, Ph.D.
Affiliations: | 2001 | Stanford University, Palo Alto, CA |
Area:
Materials Science EngineeringGoogle:
"Seok-Hee Lee"Mean distance: (not calculated yet)
Parents
Sign in to add mentorJohn C. Bravman | grad student | 2001 | Stanford | |
(Effects of processing on void nucleation in aluminum and copper interconnects.) |
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Publications
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Jeong H, Lee J, Bok C, et al. (2017) Fabrication of Vertical Silicon Nanotube Array Using Spacer Patterning Technique and Metal-Assisted Chemical Etching Ieee Transactions On Nanotechnology. 16: 130-134 |
Seo Y, Lee S, Baek SHC, et al. (2015) The Mechanism of Schottky Barrier Modulation of Tantalum Nitride/Ge Contacts Ieee Electron Device Letters. 36: 997-1000 |
Jeong WJ, Kim TK, Moon JM, et al. (2015) Germanium electron-hole bilayer tunnel field-effect transistors with a symmetrically arranged double gate Semiconductor Science and Technology. 30 |
Kim CK, Ahn HJ, Moon JM, et al. (2015) Temperature control for the gate workfunction engineering of TiC film by atomic layer deposition Solid-State Electronics. 114: 90-93 |
Na S, Kang JG, Choi J, et al. (2015) Silicidation of mo-alloyed ytterbium: Mo alloying effects on microstructure evolution and contact properties Acta Materialia. 92: 1-7 |
Kim DH, Kim TK, Yoon YG, et al. (2014) First demonstration of ultra-thin SiGe-channel junctionless accumulation-mode (JAM) bulk FinFETs on Si substrate with PN junction-isolation scheme Ieee Journal of the Electron Devices Society. 2: 123-127 |
Baek SC, Seo Y, Oh JG, et al. (2014) Alleviation of fermi-level pinning effect at metal/germanium interface by the insertion of graphene layers Applied Physics Letters. 105: 73508 |
Choi J, Choi S, Kim J, et al. (2013) Silicide formation process of Er films with Ta and TaN capping layers. Acs Applied Materials & Interfaces. 5: 12744-50 |
Kim TK, Kim DH, Yoon YG, et al. (2013) First demonstration of junctionless accumulation-mode bulk FinFETs with robust junction isolation Ieee Electron Device Letters. 34: 1479-1481 |
Lee SH, Choi R, Choi C. (2013) Effects of composition and thickness of TiN metal gate on the equivalent oxide thickness and flat-band voltage in metal oxide semiconductor devices Microelectronic Engineering. 109: 160-162 |