Michael S. Hsiao

Virginia Polytechnic and State University, United States 
Electronics and Electrical Engineering, Computer Science
"Michael Hsiao"


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Manan Syal grad student 2005 Virginia Tech
Xiaoding Chen grad student 2006 Virginia Tech
Vishnu C. Vimjam grad student 2007 Virginia Tech
Nannan He grad student 2009 Virginia Tech
Mainak Banga grad student 2010 Virginia Tech
Xueqi Cheng grad student 2010 Virginia Tech
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Bhunia S, Hsiao MS, Banga M, et al. (2014) Hardware trojan attacks: Threat analysis and countermeasures Proceedings of the Ieee. 102: 1229-1247
Liao KY, Chen PJ, Lin AF, et al. (2014) GPU-based timing-aware test generation for small delay defects Proceedings - 2014 19th Ieee European Test Symposium, Ets 2014
Banga M, Hsiao MS. (2011) ODETTE: A non-scan design-for-test methodology for Trojan detection in ICs 2011 Ieee International Symposium On Hardware-Oriented Security and Trust, Host 2011. 18-23
Fang L, Hsiao MS. (2011) A fast approximation algorithm for MIN-ONE SAT and its application on MAX-SAT solving Advanced Techniques in Logic Synthesis, Optimizations and Applications. 149-170
Banga M, Rahagude N, Hsiao MS. (2011) Design-for-test methodology for non-scan at-speed testing Proceedings -Design, Automation and Test in Europe, Date. 191-196
Banga M, Hsiao MS. (2010) Trusted RTL: Trojan detection methodology in pre-silicon designs Proceedings of the 2010 Ieee International Symposium On Hardware-Oriented Security and Trust, Host 2010. 56-59
Rahagude N, Chandrasekar M, Hsiao MS. (2010) DFT + DFD: An integrated method for design for testability and diagnosability Proceedings of the Asian Test Symposium. 218-223
Li M, Zheng Y, Hsiao MS, et al. (2010) Reversible logic synthesis through ant colony optimization Proceedings -Design, Automation and Test in Europe, Date. 307-310
Banga M, Hsiao MS. (2009) A novel sustained vector technique for the detection of hardware trojans Proceedings: 22nd International Conference On Vlsi Design - Held Jointly With 7th International Conference On Embedded Systems. 327-332
Donglikar S, Banga M, Chandrasekar M, et al. (2009) Fast circuit topology based method to configure the scan chains in Illinois scan architecture Proceedings - International Test Conference
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