Michael S. Hsiao
Affiliations: | Virginia Polytechnic Institute and State University, Blacksburg, VA, United States |
Area:
Electronics and Electrical Engineering, Computer ScienceGoogle:
"Michael Hsiao"Children
Sign in to add trainee| Manan Syal | grad student | 2005 | Virginia Tech |
| Xiaoding Chen | grad student | 2006 | Virginia Tech |
| Vishnu C. Vimjam | grad student | 2007 | Virginia Tech |
| Nannan He | grad student | 2009 | Virginia Tech |
| Mainak Banga | grad student | 2010 | Virginia Tech |
| Xueqi Cheng | grad student | 2010 | Virginia Tech |
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Publications
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| Gent K, Hsiao MS. (2016) A control path aware metric for grading functional test vectors Lats 2016 - 17th Ieee Latin-American Test Symposium. 51-56 |
| Gent K, Hsiao MS. (2015) Abstraction-based relation mining for functional test generation Proceedings of the Ieee Vlsi Test Symposium. 2015 |
| Prabhu S, Acharya VV, Bagri S, et al. (2015) A diagnosis-friendly LBIST architecture with property checking Proceedings - International Test Conference. 2015 |
| Acharya VV, Bagri S, Hsiao MS. (2015) Branch guided functional test generation at the RTL Proceedings - 2015 20th Ieee European Test Symposium, Ets 2014 |
| Bhunia S, Hsiao MS, Banga M, et al. (2014) Hardware trojan attacks: Threat analysis and countermeasures Proceedings of the Ieee. 102: 1229-1247 |
| Liao KY, Chen PJ, Lin AF, et al. (2014) GPU-based timing-aware test generation for small delay defects Proceedings - 2014 19th Ieee European Test Symposium, Ets 2014 |
| Gent K, Hsiao MS. (2014) Dual-purpose mixed-level test generation using swarm intelligence Proceedings of the Asian Test Symposium. 230-235 |
| Bhunia S, Abramovici M, Agrawal D, et al. (2013) Protection against hardware trojan attacks: Towards a comprehensive solution Ieee Design and Test. 30: 6-17 |
| Wu S, Wang L, Wen X, et al. (2012) Launch-on-Shift Test Generation for Testing Scan Designs Containing Synchronous and Asynchronous Clock Domains Acm Transactions On Design Automation of Electronic Systems. 17: 48 |
| Prabhu S, Hsiao MS, Lingappan L, et al. (2012) A SMT-based diagnostic test generation method for combinational circuits Proceedings of the Ieee Vlsi Test Symposium. 215-220 |