Ashish N. Srivastava, Ph.D. - Publications
Affiliations: | 2005 | University of Michigan, Ann Arbor, Ann Arbor, MI |
Area:
Electronics and Electrical EngineeringYear | Citation | Score | |||
---|---|---|---|---|---|
2008 | Srivastava A, Chopra K, Shah S, Sylvester D, Blaauw D. A Novel Approach to Perform Gate-Level Yield Analysis and Optimization Considering Correlated Variations in Power and Performance Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 27: 272-285. DOI: 10.1109/Tcad.2007.907227 | 0.568 | |||
2008 | Blaauw D, Chopra K, Srivastava A, Scheffer L. Statistical timing analysis: From basic principles to state of the art Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 27: 589-607. DOI: 10.1109/Tcad.2007.907047 | 0.334 | |||
2007 | Srivastava A, Kachru T, Sylvester D. Low-Power-Design Space Exploration Considering Process Variation Using Robust Optimization Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 26: 67-79. DOI: 10.1109/Tcad.2006.882491 | 0.564 | |||
2004 | Rao R, Srivastava A, Blaauw D, Sylvester D. Statistical Analysis of Subthreshold Leakage Current for VLSI Circuits Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 12: 131-139. DOI: 10.1109/Tvlsi.2003.821549 | 0.519 | |||
2004 | Srivastava A, Sylvester D. Minimizing total power by simultaneous V/sub dd//V/sub th/ assignment Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 23: 665-677. DOI: 10.1109/Tcad.2004.826551 | 0.538 | |||
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