Kaviraj Chopra, Ph.D. - Publications
Affiliations: | 2008 | University of Michigan, Ann Arbor, Ann Arbor, MI |
Area:
Computer Science, Electronics and Electrical EngineeringYear | Citation | Score | |||
---|---|---|---|---|---|
2008 | Srivastava A, Chopra K, Shah S, Sylvester D, Blaauw D. A Novel Approach to Perform Gate-Level Yield Analysis and Optimization Considering Correlated Variations in Power and Performance Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 27: 272-285. DOI: 10.1109/Tcad.2007.907227 | 0.477 | |||
2008 | Blaauw D, Chopra K, Srivastava A, Scheffer L. Statistical timing analysis: From basic principles to state of the art Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 27: 589-607. DOI: 10.1109/Tcad.2007.907047 | 0.447 | |||
2007 | Rao RR, Chopra K, Blaauw DT, Sylvester DM. Computing the soft error rate of a combinational logic circuit using parameterized descriptors Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 26: 468-478. DOI: 10.1109/Tcad.2007.891036 | 0.461 | |||
2006 | Chopra K, Vrudhula S. Efficient symbolic algorithms for computing the minimum and bounded leakage states Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 25: 2820-2832. DOI: 10.1109/Tcad.2006.882603 | 0.363 | |||
2005 | Blaauw D, Chopra K. CAD tools for variation tolerance Proceedings - Design Automation Conference. 766. | 0.454 | |||
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