Year |
Citation |
Score |
2019 |
Tsiokanos I, Mukhanov L, Nikolopoulos DS, Karakonstantis G. Significance-Driven Data Truncation for Preventing Timing Failures Ieee Transactions On Device and Materials Reliability. 19: 25-36. DOI: 10.1109/Tdmr.2019.2898949 |
0.44 |
|
2019 |
Tovletoglou K, Mukhanov L, Nikolopoulos DS, Karakonstantis G. Shimmer: Implementing a Heterogeneous-Reliability DRAM Framework on a Commodity Server Ieee Computer Architecture Letters. 18: 26-29. DOI: 10.1109/Lca.2019.2893189 |
0.355 |
|
2018 |
Chalios C, Georgakoudis G, Tovletoglou K, Karakonstantis G, Vandierendonck H, Nikolopoulos DS. DARE: Data-Access Aware Refresh via spatial-temporal application resilience on commodity servers International Journal of High Performance Computing Applications. 32: 74-88. DOI: 10.1177/1094342017718612 |
0.345 |
|
2016 |
Basu S, Valle PGD, Karakonstantis G, Ansaloni G, Pozzi L, Atienza D. Inexact-Aware Architecture Design for Ultra-Low Power Bio-Signal Analysis Iet Computers and Digital Techniques. 10: 306-314. DOI: 10.1049/Iet-Cdt.2015.0194 |
0.498 |
|
2015 |
Ganapathy S, Karakonstantis G, Teman A, Burg A. Mitigating the impact of faults in unreliable memories for error-resilient applications Proceedings - Design Automation Conference. 2015. DOI: 10.1145/2744769.2744871 |
0.314 |
|
2015 |
Owaida M, Falcao G, Andrade J, Antonopoulos C, Bellas N, Purnaprajna M, Novo, Karakonstantis G, Burg A, Ienne P. Enhancing design space exploration by extending CPU/GPU specifications onto FPGAs Acm Transactions On Embedded Computing Systems. 14: 33. DOI: 10.1145/2656207 |
0.351 |
|
2015 |
Constantin J, Wang L, Karakonstantis G, Chattopadhyay A, Burg A. Exploiting dynamic timing margins in microprocessors for frequency-over-scaling with instruction-based clock adjustment Proceedings -Design, Automation and Test in Europe, Date. 2015: 381-386. |
0.335 |
|
2015 |
Teman A, Karakonstantis G, Giterman R, Meinerzhagen P, Burg A. Energy versus data integrity trade-offs in embedded high-density logic compatible dynamic memories Proceedings -Design, Automation and Test in Europe, Date. 2015: 489-494. |
0.366 |
|
2014 |
Moradi F, Panagopoulos G, Karakonstantis G, Farkhani H, Wisland DT, Madsen JK, Mahmoodi H, Roy K. Multi-level wordline driver for robust SRAM design in nano-scale CMOS technology Microelectronics Journal. 45: 23-34. DOI: 10.1016/J.Mejo.2013.09.009 |
0.709 |
|
2012 |
Sabry MM, Karakonstantis G, Atienza D, Burg A. Design of energy efficient and dependable health monitoring systems under unreliable nanometer technologies Bodynets 2012 - 7th International Conference On Body Area Networks. DOI: 10.4108/icst.bodynets.2012.249935 |
0.328 |
|
2012 |
Karakonstantis G, Roth C, Benkeser C, Burg A. On the exploitation of the inherent error resilience of wireless systems under unreliable silicon Proceedings - Design Automation Conference. 510-515. DOI: 10.1145/2228360.2228451 |
0.34 |
|
2012 |
Karakonstantis G, Mohapatra D, Roy K. Logic and memory design based on unequal error protection for voltage-scalable, robust and adaptive DSP systems Journal of Signal Processing Systems. 68: 415-431. DOI: 10.1007/s11265-011-0631-9 |
0.447 |
|
2011 |
Karakonstantis G, Chatterjee A, Roy K. Containing the nanometer "pandora-box": Cross-layer design techniques for variation aware low power systems Ieee Journal On Emerging and Selected Topics in Circuits and Systems. 1: 19-29. DOI: 10.1109/Jetcas.2011.2135590 |
0.599 |
|
2011 |
Moradi F, Panagopoulos G, Karakonstantis G, Wisland D, Mahmoodi H, Madsen JK, Roy K. Multi-level wordline driver for low power SRAMs in nano-scale CMOS technology Proceedings - Ieee International Conference On Computer Design: Vlsi in Computers and Processors. 326-331. DOI: 10.1109/ICCD.2011.6081419 |
0.588 |
|
2011 |
Karakonstantis G, Roy K. Voltage over-scaling: A cross-layer design perspective for energy efficient systems 2011 20th European Conference On Circuit Theory and Design, Ecctd 2011. 548-551. DOI: 10.1109/ECCTD.2011.6043592 |
0.587 |
|
2011 |
Karakonstantis G, Roy K. Low-power and variation-tolerant application-specific system design Low-Power Variation-Tolerant Design in Nanometer Silicon. 249-292. DOI: 10.1007/978-1-4419-7418-1_8 |
0.548 |
|
2010 |
Markandeya H, Karakonstantis G, Raghunathan S, Irazoqui P, Roy K. Low-power DWT-based quasi-averaging algorithm and architecture for epileptic seizure detection Proceedings of the International Symposium On Low Power Electronics and Design. 301-306. DOI: 10.1145/1840845.1840907 |
0.414 |
|
2010 |
Karakonstantis G, Panagopoulos G, Roy K. HERQULES: System level cross-layer design exploration for efficient energy-quality trade-offs Proceedings of the International Symposium On Low Power Electronics and Design. 117-122. DOI: 10.1145/1840845.1840871 |
0.366 |
|
2010 |
Karakonstantis G, Banerjee N, Roy K. Process-variation resilient and voltage-scalable dct architecture for robust low-power computing Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 18: 1461-1470. DOI: 10.1109/Tvlsi.2009.2025279 |
0.713 |
|
2010 |
Ghosh S, Mohapatra D, Karakonstantis G, Roy K. Voltage scalable high-speed robust hybrid arithmetic units using adaptive clocking Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 18: 1301-1309. DOI: 10.1109/Tvlsi.2009.2022531 |
0.7 |
|
2010 |
Karakonstantis G, Augustine C, Roy K. A self-consistent model to estimate NBTI degradation and a comprehensive on-line system lifetime enhancement technique Proceedings of the 2010 Ieee 16th International On-Line Testing Symposium, Iolts 2010. 3-8. DOI: 10.1109/IOLTS.2010.5560240 |
0.668 |
|
2010 |
Gupta V, Karakonstantis G, Mohapatra D, Roy K. VEDA: Variation-aware energy-efficient discrete Wavelet Transform architecture Proceedings - Ieee International Conference On Computer Design: Vlsi in Computers and Processors. 260-265. DOI: 10.1109/ICCD.2010.5647753 |
0.494 |
|
2010 |
Moradi F, Augustine C, Goel A, Karakonstantis G, Cao TV, Wisland D, Mahmoodi H, Roy K. Data-dependant sense-amplifier flip-flop for low power applications Proceedings of the Custom Integrated Circuits Conference. DOI: 10.1109/CICC.2010.5617468 |
0.715 |
|
2009 |
Mohapatra D, Karakonstantis G, Roy K. Significance driven computation: A voltage-scalable, variation-aware, quality-tuning motion estimator Proceedings of the International Symposium On Low Power Electronics and Design. 195-200. DOI: 10.1145/1594233.1594282 |
0.403 |
|
2009 |
Banerjee N, Karakonstantis G, Choi JH, Chakrabarti C, Roy K. Design methodology for low power and arametric robustness through output-quality modulation: Application to color-interpolation filtering Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 28: 1127-1137. DOI: 10.1109/Tcad.2009.2022197 |
0.719 |
|
2009 |
Karakonstantis G, Mohapatra D, Roy K. System level DSP synthesis using voltage overscaling, unequal error protection & adaptive quality tuning Ieee Workshop On Signal Processing Systems, Sips: Design and Implementation. 133-138. DOI: 10.1109/SIPS.2009.5336238 |
0.426 |
|
2009 |
Banerjee N, Karakonstantis G, Choi JH, Chakrabarti C, Roy K. Design methodology for low power and parametric robustness through output-quality modulation: Application to color-interpolation filtering Ieee Transactions On Computer-Aided Design of Integrated Circuits and Systems. 28: 1127-1137. |
0.374 |
|
2007 |
Mohapatra D, Karakonstantis G, Roy K. Low-power process-variation tolerant arithmetic units using input-based elastic clocking Proceedings of the International Symposium On Low Power Electronics and Design. 74-79. DOI: 10.1145/1283780.1283797 |
0.623 |
|
2007 |
Karakonstantis G, Banerjee N, Roy K, Chakrabarti C. Design methodology to trade off power, output quality and error resiliency: Application to color interpolation filtering Ieee/Acm International Conference On Computer-Aided Design, Digest of Technical Papers, Iccad. 199-204. DOI: 10.1109/ICCAD.2007.4397266 |
0.619 |
|
2007 |
Karakonstantis G, Roy K. An optimal algorithm for low power multiplierless fir filter design using chebychev criterion Icassp, Ieee International Conference On Acoustics, Speech and Signal Processing - Proceedings. 2: II49-II52. DOI: 10.1109/ICASSP.2007.366169 |
0.5 |
|
2007 |
Banerjee N, Karakonstantis G, Roy K. Process variation tolerant low power DCT architecture Proceedings -Design, Automation and Test in Europe, Date. 630-635. DOI: 10.1109/DATE.2007.364664 |
0.637 |
|
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