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Niraj K. Jha

Affiliations: 
1987- Electrical Engineering Princeton University, Princeton, NJ 
Area:
Biological & Biomedical,Computing & Networking,Energy & Environment,High-Performance Computing,Integrated Electronic Systems,Nanotechnologies,Quantum Information,Security
Website:
https://ece.princeton.edu/people/niraj-jha
Google:
"Niraj Kumar Jha" OR "Niraj K Jha"
Bio:

https://www.princeton.edu/~jha/files/students.html
http://hdl.handle.net/2142/103907
https://books.google.com/books?id=6pUvAQAAIAAJ

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Parents

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Jacob A. Abraham grad student 1986 UIUC
 (Totally Self-checking Circuits and Testable CMOS Circuits)

Children

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Lin Zhong grad student
Anand Raghunathan grad student 1997 Princeton (Computer Science Tree)
Kamal S. Khouri grad student 2000 Princeton
Srivaths Ravi grad student 2001 Princeton
Jiong Luo grad student 2003 Princeton
Li Shang grad student 2004 Princeton
Tat K. Tan grad student 2004 Princeton
Keith S. Vallerio grad student 2004 Princeton
Weidong Wang grad student 2004 Princeton
Loganathan Lingappan grad student 2006 Princeton
Le Yan grad student 2006 Princeton
Pallav Gupta grad student 2007 Princeton
Najwa Aaraj grad student 2009 Princeton
Amit Kumar grad student 2010 Princeton
Muzaffer O. Simsir grad student 2010 Princeton
Niket Agarwal grad student 2011 Princeton
Chunxiao Li grad student 2012 Princeton
Prateek Mishra grad student 2012 Princeton
Ajay N. Bhoj grad student 2013 Princeton
Jun W. Chuah grad student 2013 Princeton
Chun-Yi Lee grad student 2013 Princeton
Mohammed Shoaib grad student 2013 Princeton
Ting-Jung Lin grad student 2014 Princeton
Chia-Chun Lin grad student 2014 Princeton
Sourindra M. Chaudhuri grad student 2015 Princeton

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Publications

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Chaudhuri SM, Jha NK. (2016) Ultra-low-leakage and high-performance logic circuit design using multiparameter asymmetric FinFETs Acm Journal On Emerging Technologies in Computing Systems. 12
Chaudhuri S, Bhoj AN, Bhattacharya D, et al. (2016) Fast FinFET Device Simulation under Process-Voltage Variations Using an Assisted Speed-Up Mechanism Proceedings of the Ieee International Conference On Vlsi Design. 2016: 300-305
Mozaffari-Kermani M, Sur-Kolay S, Raghunathan A, et al. (2015) Systematic Poisoning Attacks on and Defenses for Machine Learning in Healthcare. Ieee Journal of Biomedical and Health Informatics. 19: 1893-905
Chen X, Jha NK. (2015) Gem5-PVT: A framework for FinFET system simulation under PVT variations Acm Journal On Emerging Technologies in Computing Systems. 12
Kim Y, Lee WS, Raghunathan V, et al. (2015) Vibration-based secure side channel for medical devices Proceedings - Design Automation Conference. 2015
Tang A, Yang Y, Lee CY, et al. (2015) McPAT-PVT: Delay and power modeling framework for FinFET processor architectures under PVT variations Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 23: 1616-1627
Bhattacharya D, Bhoj AN, Jha NK. (2015) Design of efficient content addressable memories in high-performance FinFET technology Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 23: 963-967
Shoaib M, Jha NK, Verma N. (2015) Signal processing with direct computations on compressively sensed data Ieee Transactions On Very Large Scale Integration (Vlsi) Systems. 23: 30-43
Jha NK, Agarwal N, Singh P. (2015) Realization of congestion in software defined networks International Conference On Computing, Communication and Automation, Iccca 2015. 535-539
Kim Y, Lee W, Raghunathan A, et al. (2015) Reliability and security of implantable and wearable medical devices Implantable Biomedical Microsystems: Design Principles and Applications. 167-199
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