Anisur Rahman, Ph.D.
Affiliations: | 2005 | Purdue University, West Lafayette, IN, United States |
Area:
Electronics and Electrical EngineeringGoogle:
"Anisur Rahman"Parents
Sign in to add mentor| Mark S. Lundstrom | grad student | 2005 | Purdue | |
| (Exploring new channel materials for nanoscale CMOS devices: A simulation approach.) | ||||
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Publications
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| Rahman A, Lundstrom MS. (2015) Erratum: A Compact Scattering Model for the Nanoscale Double-Gate MOSFET [Mar 02 481-489] Ieee Transactions On Electron Devices. 62: 2367-2367 |
| Rahman A, Klimeck G, Lundstrom M, et al. (2005) Atomistic Approach for Nanoscale Devices at the Scaling Limit and Beyond– Valley Splitting in Si Japanese Journal of Applied Physics. 44: 2187-2190 |
| Wang J, Rahman A, Ghosh A, et al. (2005) On the Validity of the Parabolic Effective-Mass Approximation for the I–V Calculation of Silicon Nanowire Transistors Ieee Transactions On Electron Devices. 52: 1589-1595 |
| Wang J, Rahman A, Ghosh A, et al. (2005) Performance evaluation of ballistic silicon nanowire transistors with atomic-basis dispersion relations Applied Physics Letters. 86: 093113 |
| Rahman A, Lundstrom MS, Ghosh AW. (2005) Generalized effective-mass approach for n -type metal-oxide-semiconductor field-effect transistors on arbitrarily oriented wafers Journal of Applied Physics. 97 |
| Rahman A, Klimeck G, Vagidov N, et al. (2004) Nanoscale Device Simulation at the Scaling Limit and Beyond The Japan Society of Applied Physics. 2004: 726-727 |
| Rahman A, Guo J, Datta S, et al. (2003) Theory of ballistic nanotransistors Ieee Transactions On Electron Devices. 50: 1853-1864 |
| Rahman A, Lundstrom MS. (2002) A compact scattering model for the nanoscale double-gate MOSFET Ieee Transactions On Electron Devices. 49: 481-489 |