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Yang K. Choi, Ph.D. - Publications

Affiliations: 
2001 University of California, Berkeley, Berkeley, CA, United States 
Area:
Semiconductor Device Technologies
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257 high-probability publications. We are testing a new system for linking publications to authors. You can help! If you notice any inaccuracies, please sign in and mark papers as correct or incorrect matches. If you identify any major omissions or other inaccuracies in the publication list, please let us know.

Year Citation  Score
2020 Shin GH, Lee GB, An ES, Park C, Jin HJ, Lee KJ, Oh D, Kim JS, Choi YK, Choi SY. High-Performance Field-Effect Transistor and Logic Gates based on GaS-MoS2 van der Waals Heterostructure. Acs Applied Materials & Interfaces. PMID 31898448 DOI: 10.1021/Acsami.9B20077  0.426
2020 Han J, Hur J, Kim W, Park J, Lee S, Kim S, Yu J, Choi Y. A Study of High-Temperature Effects on an Asymmetrically Doped Vertical Pillar-Type Field-Effect Transistor Ieee Transactions On Nanotechnology. 19: 52-55. DOI: 10.1109/Tnano.2019.2958099  0.337
2020 Son JW, Hur J, Kim W, Lee G, Choi Y. A Strategy for Optimizing Low Operating Voltage in a Silicon Biristor Ieee Transactions On Nanotechnology. 19: 5-10. DOI: 10.1109/Tnano.2019.2956092  0.403
2020 Yu J, Park J, Yoo TJ, Han J, Yun D, Lee G, Hur J, Lee B, Kim S, Lee BH, Choi Y. Quantitative Analysis of High-Pressure Deuterium Annealing Effects on Vertically Stacked Gate-All-Around SONOS Memory Ieee Transactions On Electron Devices. 67: 3903-3907. DOI: 10.1109/Ted.2020.3008882  0.393
2020 Park J, Moon D, Lee G, Choi Y. Curing of Aged Gate Dielectric by the Self-Heating Effect in MOSFETs Ieee Transactions On Electron Devices. 67: 777-788. DOI: 10.1109/Ted.2020.2964846  0.39
2020 Han J, Seo M, Yu J, Suh Y, Choi Y. A Single Transistor Neuron With Independently Accessed Double-Gate for Excitatory-Inhibitory Function and Tunable Firing Threshold Voltage Ieee Electron Device Letters. 41: 1157-1160. DOI: 10.1109/Led.2020.3001953  0.33
2020 Lee TY, Lee SH, Son JW, Lee SJ, Bong JH, Shin EJ, Kim SH, Hwang WS, Moon JM, Choi YK, Cho BJ. Analysis of fluorine effects on charge-trap flash memory of W/TiN/Al2O3/Si3N4/SiO2/poly-Si gate stack Solid-State Electronics. 164: 107713. DOI: 10.1016/J.Sse.2019.107713  0.323
2020 Lee G, Kim C, Bang T, Yoo M, Park J, Choi Y. Analysis of damage curing in a MOSFET with joule heat generated by forward junction current at the source and drain Microelectronics Reliability. 104: 113548. DOI: 10.1016/J.Microrel.2019.113548  0.305
2019 Kwon J, Lee BH, Kim SY, Park JY, Bae H, Choi YK, Ahn JH. Nanoscale FET-Based Transduction toward Sensitive Extended-Gate Biosensors. Acs Sensors. PMID 31199112 DOI: 10.1021/Acssensors.9B00731  0.352
2019 Shin GH, Park J, Lee KJ, Lee GB, Jeon HB, Choi YK, Yu K, Choi SY. Si-MoS2 Vertical Heterojunction for Photodetector with High Responsivity and Low Noise Equivalent Power. Acs Applied Materials & Interfaces. PMID 30673232 DOI: 10.1021/Acsami.8B21629  0.385
2019 Yu J, Park J, Lee G, Han J, Kim M, Hur J, Yun D, Kim S, Choi Y. Demonstration of Thermally-Assisted Programming With High Speed and Improved Reliability for Junctionless Nanowire NOR Flash Memory Ieee Transactions On Nanotechnology. 18: 1110-1113. DOI: 10.1109/Tnano.2019.2945321  0.333
2019 Lee G, Kim C, Yoo M, Hur J, Choi Y. Effect of OFF-State Stress on Gate-Induced Drain Leakage by Interface Traps in Buried-Gate FETs Ieee Transactions On Electron Devices. 66: 5126-5132. DOI: 10.1109/Ted.2019.2947603  0.4
2019 Park J, Yun D, Choi Y. Curing of Hot-Carrier Induced Damage by Gate-Induced Drain Leakage Current in Gate-All-Around FETs Ieee Electron Device Letters. 40: 1909-1912. DOI: 10.1109/Led.2019.2946393  0.416
2019 Kim M, Ahn D, Park J, Seo M, Kim S, Kim W, Yun D, Choi Y. Electro-Thermal Erasing at 10 4 -Fold Faster Speeds in Charge-Trap Flash Memory Ieee Electron Device Letters. 40: 196-199. DOI: 10.1109/Led.2018.2885092  0.361
2019 Park J, Lee G, Choi Y. A Comparative Study of the Curing Effects of Local and Global Thermal Annealing on a FinFET Ieee Journal of the Electron Devices Society. 7: 954-958. DOI: 10.1109/Jeds.2019.2937802  0.348
2019 Han J, Park J, Choi Y. Power reduction for recovery of a FinFET by electrothermal annealing Solid-State Electronics. 151: 6-10. DOI: 10.1016/J.Sse.2018.10.008  0.348
2019 Jeon S, Kim W, Park S, Tcho I, Jin I, Han J, Kim D, Choi Y. Self-powered wearable touchpad composed of all commercial fabrics utilizing a crossline array of triboelectric generators Nano Energy. 65: 103994. DOI: 10.1016/J.Nanoen.2019.103994  0.364
2019 Kim D, Kim W, Jin IK, Park H, Im SG, Choi Y. A study of the charge distribution and output characteristics of an ultra-thin tribo-dielectric layer Nano Energy. 62: 458-464. DOI: 10.1016/J.Nanoen.2019.05.070  0.35
2019 Hwang K, Kim W, Jin IK, Lee S, Choi Y. Physical Unclonable Function: Multilevel States of Nano‐Electromechanical Switch for a PUF‐Based Security Device (Small 3/2019) Small. 15: 1970015. DOI: 10.1002/Smll.201970015  0.304
2019 Bae H, Kim D, Seo M, Jin IK, Jeon S, Lee HM, Jung S, Jang BC, Son G, Yu K, Choi S, Choi Y. Bioinspired Polydopamine‐Based Resistive‐Switching Memory on Cotton Fabric for Wearable Neuromorphic Device Applications Advanced Materials Technologies. 4: 1900151. DOI: 10.1002/Admt.201900151  0.36
2018 Hwang KM, Kim WK, Jin IK, Lee SW, Choi YK. Multilevel States of Nano-Electromechanical Switch for a PUF-Based Security Device. Small (Weinheim An Der Bergstrasse, Germany). e1803825. PMID 30474321 DOI: 10.1002/Smll.201803825  0.331
2018 Park JY, Kim WG, Bae H, Jin IK, Kim DJ, Im H, Tcho IW, Choi YK. On-Chip Curing by Microwave for Long Term Usage of Electronic Devices in Harsh Environments. Scientific Reports. 8: 14953. PMID 30297916 DOI: 10.1038/S41598-018-33309-X  0.394
2018 Kim D, Jin IK, Choi YK. Ferromagnetic nanoparticle-embedded hybrid nanogenerator for harvesting omnidirectional vibration energy. Nanoscale. PMID 29938284 DOI: 10.1039/C8Nr02039F  0.334
2018 Kwon JH, Park JH, Lee MK, Park JW, Jeon Y, Shin JB, Nam M, Kim CK, Choi YK, Choi KC. Low-Temperature Fabrication of Robust, Transparent, and Flexible Thin Film Transistor with Nano-Laminated Insulator. Acs Applied Materials & Interfaces. PMID 29672018 DOI: 10.1021/Acsami.8B01438  0.348
2018 Park JY, Lee BH, Lee GB, Bae H, Choi YK. Localized Electrothermal Annealing with Nano-Watt Power for a Silicon Nanowire Field-Effect Transistor. Acs Applied Materials & Interfaces. PMID 29323476 DOI: 10.1021/Acsami.7B17794  0.374
2018 Lee S, Kim S, Hwang K, Jin IK, Hur J, Kim D, Son JW, Kim W, Choi Y. A Comprehensive Study of a Single-Transistor Latch in Vertical Pillar-Type FETs With Asymmetric Source and Drain Ieee Transactions On Electron Devices. 65: 5208-5212. DOI: 10.1109/Ted.2018.2869670  0.318
2018 Kim D, Lim SK, Bae H, Kim C, Lee S, Seo M, Kim S, Hwang K, Lee G, Lee BH, Choi Y. Quantitative Analysis of Deuterium Annealing Effect on Poly-Si TFTs by Low Frequency Noise and DC ${I}$ – ${V}$ Characterization Ieee Transactions On Electron Devices. 65: 1640-1644. DOI: 10.1109/Ted.2018.2805316  0.328
2018 Kim G, Bae H, Hur J, Kim C, Lee G, Bang T, Son Y, Ryu S, Choi Y. Highly Biased Linear Condition Method for Separately Extracting Source and Drain Resistance in MOSFETs Ieee Transactions On Electron Devices. 65: 419-423. DOI: 10.1109/Ted.2017.2783924  0.329
2018 Han J, Park J, Kim C, Kwon JH, Kim M, Hwang B, Kim D, Choi KC, Choi Y. Electrothermal Annealing to Enhance the Electrical Performance of an Exfoliated MoS 2 Field-Effect Transistor Ieee Electron Device Letters. 39: 1532-1535. DOI: 10.1109/Led.2018.2867569  0.397
2018 Seo M, Kang M, Jeon S, Bae H, Hur J, Jang BC, Yun S, Cho S, Kim W, Kim M, Hwang K, Hong S, Choi S, Choi Y. First Demonstration of a Logic-Process Compatible Junctionless Ferroelectric FinFET Synapse for Neuromorphic Applications Ieee Electron Device Letters. 39: 1445-1448. DOI: 10.1109/Led.2018.2852698  0.322
2018 Park J, Hur J, Choi Y. Demonstration of a Curable Nanowire FinFET Using Punchthrough Current to Repair Hot-Carrier Damage Ieee Electron Device Letters. 39: 180-183. DOI: 10.1109/Led.2017.2787778  0.412
2018 Kim S, Lee B, Hur J, Park J, Jeon S, Lee S, Choi Y. A Comparative Study on Hot-Carrier Injection in 5-Story Vertically Integrated Inversion-Mode and Junctionless-Mode Gate-All-Around MOSFETs Ieee Electron Device Letters. 39: 4-7. DOI: 10.1109/Led.2017.2772871  0.359
2018 Bae H, Jun S, Kim CK, Ju BK, Choi YK. Quantitative analysis of trap states through the behavior of the sulfur ions in MoS2 FETs following high vacuum annealing Journal of Physics D. 51: 105102. DOI: 10.1088/1361-6463/Aaa9C9  0.355
2018 Jeon S, Park S, Kim W, Tcho I, Jin I, Han J, Kim D, Choi Y. Self-powered wearable keyboard with fabric based triboelectric nanogenerator Nano Energy. 53: 596-603. DOI: 10.1016/J.Nanoen.2018.09.024  0.38
2018 Jin IK, Park J, Lee B, Jeon S, Tcho I, Park S, Kim W, Han J, Lee S, Kim S, Bae H, Kim D, Choi Y. Self-powered data erasing of nanoscale flash memory by triboelectricity Nano Energy. 52: 63-70. DOI: 10.1016/J.Nanoen.2018.07.040  0.34
2018 Tcho I, Jeon S, Park S, Kim W, Jin IK, Han J, Kim D, Choi Y. Disk-based triboelectric nanogenerator operated by rotational force converted from linear force by a gear system Nano Energy. 50: 489-496. DOI: 10.1016/J.Nanoen.2018.05.067  0.321
2018 Hur J, Jang BC, Park J, Moon D, Bae H, Park J, Kim G, Jeon S, Seo M, Kim S, Choi S, Choi Y. A Recoverable Synapse Device Using a Three-Dimensional Silicon Transistor Advanced Functional Materials. 28: 1804844. DOI: 10.1002/Adfm.201804844  0.365
2017 Hwang KM, Park JY, Bae H, Lee SW, Kim CK, Seo M, Im H, Kim DH, Kim SY, Lee GB, Choi YK. Nano-electromechanical Switch Based on a Physical Unclonable Function for Highly Robust and Stable Performance in Harsh Environments. Acs Nano. PMID 29235347 DOI: 10.1021/Acsnano.7B06658  0.349
2017 Bae H, Jang BC, Park H, Jung SH, Lee HM, Park JY, Jeon SB, Son G, Tcho IW, Yu K, Im SG, Choi SY, Choi YK. Functional Circuitry on Commercial Fabric via Textile-Compatible Nanoscale Film Coating Process for Fibertronics. Nano Letters. PMID 28892637 DOI: 10.1021/Acs.Nanolett.7B03435  0.344
2017 Kang H, Kim JY, Choi YK, Nam Y. Feasibility Study of Extended-Gate-Type Silicon Nanowire Field-Effect Transistors for Neural Recording. Sensors (Basel, Switzerland). 17. PMID 28350370 DOI: 10.3390/S17040705  0.343
2017 Bae H, Bang T, Kim C, Hur J, Kim S, Jeon C, Park J, Ahn D, Kim G, Son Y, Lee J, Kim Y, Ryu S, Choi Y. Improved Technique for Extraction of Effective Mobility by Considering Gate Bias-Dependent Inversion Charges in a Floating-Body Si/SiGe pMOSFET Journal of Nanoscience and Nanotechnology. 17: 3247-3250. DOI: 10.1166/Jnn.2017.14035  0.332
2017 Hur J, Moon D, Han J, Kim G, Jeon C, Choi Y. Tunneling Effects in a Charge-Plasma Dopingless Transistor Ieee Transactions On Nanotechnology. 16: 315-320. DOI: 10.1109/Tnano.2017.2663659  0.388
2017 Jeon C, Kim C, Park J, Jeong U, Lee B, Kim KR, Choi Y. LF Noise Analysis for Trap Recovery in Gate Oxides Using Built-In Joule Heater Ieee Transactions On Electron Devices. 64: 5081-5086. DOI: 10.1109/Ted.2017.2761770  0.355
2017 Hur J, Jeong WJ, Shin M, Choi Y. Schottky Tunneling Effects in a Tunnel FET Ieee Transactions On Electron Devices. 64: 5223-5229. DOI: 10.1109/Ted.2017.2757260  0.404
2017 Park J, Lee B, Chang KS, Kim DU, Jeong C, Kim C, Bae H, Choi Y. Investigation of Self-Heating Effects in Gate-All-Around MOSFETs With Vertically Stacked Multiple Silicon Nanowire Channels Ieee Transactions On Electron Devices. 64: 4393-4399. DOI: 10.1109/Ted.2017.2749324  0.386
2017 Seo Y, Kim C, Lee T, Hwang WS, Yu H, Choi Y, Cho BJ. Investigation of Border Trap Characteristics in the AlON/GeO 2 /Ge Gate Stacks Ieee Transactions On Electron Devices. 64: 3998-4001. DOI: 10.1109/Ted.2017.2741496  0.4
2017 Lee MK, Kim C, Park JW, Kim E, Seol M, Park J, Choi Y, Park SK, Choi KC. Electro-Thermal Annealing Method for Recovery of Cyclic Bending Stress in Flexible a-IGZO TFTs Ieee Transactions On Electron Devices. 64: 3189-3192. DOI: 10.1109/Ted.2017.2717444  0.314
2017 Lee G, Kim C, Park J, Bang T, Bae H, Kim S, Ryu S, Choi Y. A Novel Technique for Curing Hot-Carrier-Induced Damage by Utilizing the Forward Current of the PN-Junction in a MOSFET Ieee Electron Device Letters. 38: 1012-1014. DOI: 10.1109/Led.2017.2718583  0.394
2017 Bang T, Lee B, Kim C, Ahn D, Jeon S, Kang M, Oh J, Choi Y. Low-Frequency Noise Characteristics in SONOS Flash Memory With Vertically Stacked Nanowire FETs Ieee Electron Device Letters. 38: 40-43. DOI: 10.1109/Led.2016.2632182  0.326
2017 Ahn J, Choi S, Im M, Kim S, Kim C, Kim J, Park TJ, Lee SY, Choi Y. Charge and dielectric effects of biomolecules on electrical characteristics of nanowire FET biosensors Applied Physics Letters. 111: 113701. DOI: 10.1063/1.5003106  0.321
2017 Bae H, Kim C, Choi Y. Characterization of intrinsic subgap density-of-states in exfoliated MoS2 FETs using a multi-frequency capacitance-conductance technique Aip Advances. 7: 75304. DOI: 10.1063/1.4985752  0.306
2017 Ahn J, Moon D, Ko S, Kim C, Kim J, Kim M, Seol M, Moon J, Choi J, Oh J, Choi S, Choi Y. A SONOS device with a separated charge trapping layer for improvement of charge injection Aip Advances. 7: 35205. DOI: 10.1063/1.4978322  0.421
2017 Hwang BW, Yeom H, Kim D, Kim C, Lee D, Choi Y. Enhanced transconductance in a double-gate graphene field-effect transistor Solid-State Electronics. 141: 65-68. DOI: 10.1016/J.Sse.2017.12.008  0.387
2016 Kim CK, Jeong EG, Kim E, Song JG, Kim Y, Woo WJ, Lee MK, Bae H, Jeon SB, Kim H, Choi KC, Choi YK. Highly stable 2D material (2DM) field-effect transistors (FETs) with wafer-scale multidyad encapsulation. Nanotechnology. 28: 055203. PMID 28029109 DOI: 10.1088/1361-6528/Aa5235  0.348
2016 Lee D, Lee BH, Yoon J, Ahn DC, Park JY, Hur J, Kim MS, Jeon SB, Kang MH, Kim K, Lim M, Choi SJ, Choi YK. Three-Dimensional Fin-Structured Semiconducting Carbon Nanotube Network Transistor. Acs Nano. 10: 10894-10900. PMID 28024320 DOI: 10.1021/Acsnano.6B05429  0.384
2016 Lee BH, Lee DI, Bae H, Seong H, Jeon SB, Seol ML, Han JW, Meyyappan M, Im SG, Choi YK. Foldable and Disposable Memory on Paper. Scientific Reports. 6: 38389. PMID 27922094 DOI: 10.1038/Srep38389  0.328
2016 Bae H, Lee BH, Lee D, Seol ML, Kim D, Han JW, Kim CK, Jeon SB, Ahn D, Park SJ, Park JY, Choi YK. Physically Transient Memory on a Rapidly Dissoluble Paper for Security Application. Scientific Reports. 6: 38324. PMID 27917910 DOI: 10.1038/Srep38324  0.328
2016 Yun J, Ahn JH, Lee BJ, Moon DI, Choi YK, Park I. Temperature measurement of Joule heated silicon micro/nanowires using selectively decorated quantum dots. Nanotechnology. 27: 505705. PMID 27869647 DOI: 10.1088/0957-4484/27/50/505705  0.305
2016 Lee BH, Ahn DC, Kang MH, Jeon SB, Choi YK. A Vertically Integrated Nanowire-based Unified Memory. Nano Letters. PMID 27579769 DOI: 10.1021/Acs.Nanolett.6B02824  0.354
2016 Kim CK, Kim E, Lee MK, Park JY, Seol ML, Bae H, Bang T, Jeon SB, Jun S, Park SK, Choi KC, Choi YK. An electro-thermal annealing (ETA) method to enhance the electrical performance of amorphous-oxide-semiconductor (AOS) thin-film transistors (TFTs). Acs Applied Materials & Interfaces. PMID 27552134 DOI: 10.1021/Acsami.6B06377  0.342
2016 Kim D, Im H, Kwak MJ, Byun E, Im SG, Choi YK. A Superamphiphobic Sponge with Mechanical Durability and a Self-Cleaning Effect. Scientific Reports. 6: 29993. PMID 27435167 DOI: 10.1038/Srep29993  0.307
2016 Lee D, Yoon J, Lee J, Lee BH, Seol ML, Bae H, Jeon SB, Seong H, Im SG, Choi SJ, Choi YK. Logic circuits composed of flexible carbon nanotube thin-film transistor and ultra-thin polymer gate dielectric. Scientific Reports. 6: 26121. PMID 27184121 DOI: 10.1038/Srep26121  0.405
2016 Lee BH, Hur J, Kang MH, Bang T, Ahn DC, Lee D, Kim KH, Choi YK. A Vertically Integrated Junctionless Nanowire Transistor. Nano Letters. PMID 26885948 DOI: 10.1021/Acs.Nanolett.5B04926  0.411
2016 Park JY, Moon DI, Seol ML, Jeon CH, Jeon GJ, Han JW, Kim CK, Park SJ, Lee HC, Choi YK. Controllable electrical and physical breakdown of poly-crystalline silicon nanowires by thermally assisted electromigration. Scientific Reports. 6: 19314. PMID 26782708 DOI: 10.1038/Srep19314  0.367
2016 Kim CH, Kim JY, Moon DI, Choi JM, Choi YK. Nanogap Embedded Transistor for Investigation of Charge Properties in DNA Ieee Transactions On Nanotechnology. 15: 188-192. DOI: 10.1109/Tnano.2015.2512300  0.381
2016 Jeon CH, Park JY, Seol ML, Moon DI, Hur J, Bae H, Jeon SB, Choi YK. Joule Heating to Enhance the Performance of a Gate-All-Around Silicon Nanowire Transistor Ieee Transactions On Electron Devices. DOI: 10.1109/Ted.2016.2551751  0.401
2016 Jeong US, Kim CK, Bae H, Moon DI, Bang T, Choi JM, Hur J, Choi YK. Investigation of low-frequency noise in nonvolatile memory composed of a gate- all-around junctionless nanowire FET Ieee Transactions On Electron Devices. 63: 2210-2213. DOI: 10.1109/Ted.2016.2542924  0.428
2016 Park JY, Moon DI, Seol ML, Kim CK, Jeon CH, Bae H, Bang T, Choi YK. Self-Curable Gate-All-Around MOSFETs Using Electrical Annealing to Repair Degradation Induced From Hot-Carrier Injection Ieee Transactions On Electron Devices. DOI: 10.1109/Ted.2015.2513744  0.417
2016 Park J, Bae H, Moon D, Jeon C, Choi Y. Threshold Voltage Tuning Technique in Gate-All-Around MOSFETs by Utilizing Gate Electrode With Potential Distribution Ieee Electron Device Letters. 37: 1391-1394. DOI: 10.1109/Led.2016.2612653  0.418
2016 Park JY, Moon DI, Bae H, Roh YT, Seol ML, Lee BH, Jeon CH, Lee HC, Choi YK. Local Electro-Thermal Annealing for Repair of Total Ionizing Dose-Induced Damage in Gate-All-Around MOSFETs Ieee Electron Device Letters. 37: 843-846. DOI: 10.1109/Led.2016.2574341  0.399
2016 Hur J, Lee BH, Kang MH, Ahn DC, Bang T, Jeon SB, Choi YK. Comprehensive Analysis of Gate-Induced Drain Leakage in Vertically Stacked Nanowire FETs: Inversion-Mode Versus Junctionless Mode Ieee Electron Device Letters. 37: 541-544. DOI: 10.1109/Led.2016.2540645  0.324
2016 Ahn DC, Seol ML, Hur J, Moon DI, Lee BH, Han JW, Park JY, Jeon SB, Choi YK. Ultra-fast erase method of SONOS flash memory by instantaneous thermal excitation Ieee Electron Device Letters. 37: 190-192. DOI: 10.1109/Led.2015.2512280  0.415
2016 Bae H, Kim CK, Jeon SB, Shin GH, Kim ET, Song JG, Kim Y, Lee DI, Kim H, Choi SY, Choi KC, Choi YK. A separate extraction method for asymmetric source and drain resistances using frequency-dispersive C-V characteristics in exfoliated MoS2 FET Ieee Electron Device Letters. 37: 231-233. DOI: 10.1109/Led.2015.2509473  0.322
2016 Han JW, Seol ML, Choi YK, Meyyappan M. Self-destructible fin flip-flop actuated channel transistor Ieee Electron Device Letters. 37: 130-133. DOI: 10.1109/Led.2015.2507258  0.412
2016 Lee J, Yoon J, Choi B, Lee D, Kim DM, Kim DH, Choi Y, Choi S. Ink-jet printed semiconducting carbon nanotube ambipolar transistors and inverters with chemical doping technique using polyethyleneimine Applied Physics Letters. 109: 263103. DOI: 10.1063/1.4973360  0.338
2016 Ahn D, Lee B, Kang M, Hur J, Bang T, Choi Y. Impact of crystalline damage on a vertically integrated junctionless nanowire transistor Applied Physics Letters. 109: 183108. DOI: 10.1063/1.4965851  0.376
2016 Kim E, Kim C, Lee MK, Bang T, Choi Y, Park SK, Choi KC. Influence of the charge trap density distribution in a gate insulator on the positive-bias stress instability of amorphous indium-gallium-zinc oxide thin-film transistors Applied Physics Letters. 108: 182104. DOI: 10.1063/1.4948765  0.369
2016 Kim GH, Lee BH, Im H, Jeon SB, Kim D, Seol ML, Hwang H, Choi YK. Controlled anisotropic wetting of scalloped silicon nanogroove Rsc Advances. 6: 41914-41918. DOI: 10.1039/C6Ra06379A  0.318
2016 Kim WG, Tcho IW, Kim D, Jeon SB, Park SJ, Seol ML, Choi YK. Performance-enhanced triboelectric nanogenerator using the glass transition of polystyrene Nano Energy. 27: 306-312. DOI: 10.1016/J.Nanoen.2016.07.001  0.4
2016 Seol ML, Han JW, Park SJ, Jeon SB, Choi YK. Hybrid energy harvester with simultaneous triboelectric and electromagnetic generation from an embedded floating oscillator in a single package Nano Energy. 23: 50-59. DOI: 10.1016/J.Nanoen.2016.03.004  0.319
2016 Park SJ, Seol ML, Kim D, Jeon SB, Choi YK. Triboelectric nanogenerator with nanostructured metal surface using water-assisted oxidation Nano Energy. 21: 258-264. DOI: 10.1016/J.Nanoen.2016.01.021  0.306
2016 Kim D, Park S, Jeon S, Seol M, Choi Y. A Triboelectric Sponge Fabricated from a Cube Sugar Template by 3D Soft Lithography for Superhydrophobicity and Elasticity Advanced Electronic Materials. 2: 1500331. DOI: 10.1002/Aelm.201500331  0.371
2015 Kim D, Oh Y, Hwang BW, Jeon SB, Park SJ, Choi YK. Triboelectric Nanogenerator Based on the Internal Motion of Powder with a Package Structure Design. Acs Nano. PMID 26695525 DOI: 10.1021/Acsnano.5B06329  0.32
2015 Seol ML, Han JW, Jeon SB, Meyyappan M, Choi YK. Floating Oscillator-Embedded Triboelectric Generator for Versatile Mechanical Energy Harvesting. Scientific Reports. 5: 16409. PMID 26553524 DOI: 10.1038/Srep16409  0.308
2015 Lee BH, Kang MH, Ahn DC, Park JY, Bang T, Jeon SB, Hur J, Lee D, Choi YK. Vertically Integrated Multiple Nanowire Field Effect Transistor. Nano Letters. PMID 26544156 DOI: 10.1021/Acs.Nanolett.5B03460  0.451
2015 Park SJ, Seol ML, Jeon SB, Kim D, Lee D, Choi YK. Surface Engineering of Triboelectric Nanogenerator with an Electrodeposited Gold Nanoflower Structure. Scientific Reports. 5: 13866. PMID 26365054 DOI: 10.1038/Srep13866  0.329
2015 Lee J, Jang J, Choi B, Yoon J, Kim JY, Choi YK, Myong Kim D, Hwan Kim D, Choi SJ. A Highly Responsive Silicon Nanowire/Amplifier MOSFET Hybrid Biosensor. Scientific Reports. 5: 12286. PMID 26197105 DOI: 10.1038/Srep12286  0.379
2015 Lee BH, Bae H, Seong H, Lee DI, Park H, Choi YJ, Im SG, Kim SO, Choi YK. Direct Observation of a Carbon Filament in Water-Resistant Organic Memory. Acs Nano. PMID 26056735 DOI: 10.1021/Acsnano.5B02199  0.302
2015 Ahn JH, Yun J, Moon DI, Choi YK, Park I. Self-heated silicon nanowires for high performance hydrogen gas detection. Nanotechnology. 26: 095501. PMID 25670503 DOI: 10.1088/0957-4484/26/9/095501  0.339
2015 Kim MS, Moon DI, Yoo SK, Lee SH, Choi YK. Investigation of Physically Unclonable Functions Using Flash Memory for Integrated Circuit Authentication Ieee Transactions On Nanotechnology. 14: 384-389. DOI: 10.1109/Tnano.2015.2397956  0.406
2015 Hur J, Choi JM, Woo JH, Jang H, Choi YK. A Generalized Threshold Voltage Model of Tied and Untied Double-Gate Junctionless FETs for a Symmetric and Asymmetric Structure Ieee Transactions On Electron Devices. 62: 2710-2716. DOI: 10.1109/Ted.2015.2436415  0.391
2015 Hur J, Moon DI, Choi JM, Seol ML, Jeong US, Jeon CH, Choi YK. A Core Compact Model for Multiple-Gate Junctionless FETs Ieee Transactions On Electron Devices. 62: 2285-2291. DOI: 10.1109/Ted.2015.2428711  0.344
2015 Seol ML, Lee SH, Han JW, Kim D, Cho GH, Choi YK. Impact of contact pressure on output voltage of triboelectric nanogenerator based on deformation of interfacial structures Nano Energy. 17: 63-71. DOI: 10.1016/J.Nanoen.2015.08.005  0.318
2015 Kim D, Jeon SB, Kim JY, Seol ML, Kim SO, Choi YK. High-performance nanopattern triboelectric generator by block copolymer lithography Nano Energy. 12: 331-338. DOI: 10.1016/J.Nanoen.2015.01.008  0.375
2014 Seol ML, Woo JH, Lee DI, Im H, Hur J, Choi YK. Nature-replicated nano-in-micro structures for triboelectric energy harvesting. Small (Weinheim An Der Bergstrasse, Germany). 10: 3887-94. PMID 24912667 DOI: 10.1002/Smll.201400863  0.312
2014 Lee BH, Moon DI, Jang H, Kim CH, Seol ML, Choi JM, Lee DI, Kim MW, Yoon JB, Choi YK. A mechanical and electrical transistor structure (METS) with a sub-2 nm nanogap for effective voltage scaling. Nanoscale. 6: 7799-804. PMID 24892839 DOI: 10.1039/C3Nr06251A  0.406
2014 Kim JY, Ahn JH, Moon DI, Park TJ, Lee SY, Choi YK. Multiplex electrical detection of avian influenza and human immunodeficiency virus with an underlap-embedded silicon nanowire field-effect transistor. Biosensors & Bioelectronics. 55: 162-7. PMID 24374298 DOI: 10.1016/J.Bios.2013.12.014  0.407
2014 Jeong CK, Jin HM, Ahn JH, Park TJ, Yoo HG, Koo M, Choi YK, Kim SO, Lee KJ. Electrical biomolecule detection using nanopatterned silicon via block copolymer lithography. Small (Weinheim An Der Bergstrasse, Germany). 10: 337-43. PMID 23881835 DOI: 10.1002/Smll.201301202  0.391
2014 Moon JB, Moon DI, Choi YK. Influence of total ionizing dose on sub-100 nm gate-all-around MOSFETs Ieee Transactions On Nuclear Science. 61: 1420-1425. DOI: 10.1109/Tns.2014.2319245  0.363
2014 Moon DI, Kim JY, Moon JB, Kim DO, Choi YK. Evolution of unified-RAM: 1T-DRAM and BE-SONOS built on a highly scaled vertical channel Ieee Transactions On Electron Devices. 61: 60-65. DOI: 10.1109/Ted.2013.2292316  0.329
2014 Moon JB, Moon DI, Choi YK. A bandgap-engineered silicon-germanium biristor for low-voltage operation Ieee Transactions On Electron Devices. 61: 2-7. DOI: 10.1109/Ted.2013.2288272  0.395
2014 Moon D, Kim J, Jang H, Hong H, Kim CK, Oh J, Kang M, Kim J, Choi Y. A Novel FinFET With High-Speed and Prolonged Retention for Dynamic Memory Ieee Electron Device Letters. 35: 1236-1238. DOI: 10.1109/Led.2014.2365235  0.368
2014 Kim D, Moon D, Choi Y. Optimization of Bias Schemes for Long-Term Endurable 1T-DRAM Through the Use of the Biristor Mode Operation Ieee Electron Device Letters. 35: 220-222. DOI: 10.1109/Led.2013.2295240  0.306
2014 Kim DH, Kim TK, Yoon YG, Hwang BW, Choi YK, Cho BJ, Lee SH. First demonstration of ultra-thin SiGe-channel junctionless accumulation-mode (JAM) bulk FinFETs on Si substrate with PN junction-isolation scheme Ieee Journal of the Electron Devices Society. 2: 123-127. DOI: 10.1109/Jeds.2014.2326560  0.418
2014 Yoon J, Lee D, Kim C, Lee J, Choi B, Kim DM, Kim DH, Lee M, Choi Y, Choi S. Accurate extraction of mobility in carbon nanotube network transistors using C-V and I-V measurements Applied Physics Letters. 105: 212103. DOI: 10.1063/1.4902834  0.318
2014 Han J, Moon D, Oh JS, Choi Y, Meyyappan M. Vacuum gate dielectric gate-all-around nanowire for hot carrier injection and bias temperature instability free transistor Applied Physics Letters. 104: 253506. DOI: 10.1063/1.4885595  0.427
2014 Lee D, Seol ML, Moon DI, Bennett P, Yoder N, Humes J, Bokor J, Choi YK, Choi SJ. High-performance thin-film transistors produced from highly separated solution-processed carbon nanotubes Applied Physics Letters. 104. DOI: 10.1063/1.4871100  0.314
2014 Ahn JH, Yun J, Choi YK, Park I. Palladium nanoparticle decorated silicon nanowire field-effect transistor with side-gates for hydrogen gas detection Applied Physics Letters. 104. DOI: 10.1063/1.4861228  0.372
2014 Jeong CK, Jin HM, Ahn J, Park TJ, Yoo HG, Koo M, Choi Y, Kim SO, Lee KJ. Biosensors: Electrical Biomolecule Detection Using Nanopatterned Silicon via Block Copolymer Lithography (Small 2/2014) Small. 10: 213-213. DOI: 10.1002/Smll.201470009  0.316
2013 Seol ML, Im H, Moon DI, Woo JH, Kim D, Choi SJ, Choi YK. Design strategy for a piezoelectric nanogenerator with a well-ordered nanoshell array. Acs Nano. 7: 10773-9. PMID 24255989 DOI: 10.1021/Nn403940V  0.323
2013 Kim JY, Choi K, Moon DI, Ahn JH, Park TJ, Lee SY, Choi YK. Surface engineering for enhancement of sensitivity in an underlap-FET biosensor by control of wettability. Biosensors & Bioelectronics. 41: 867-70. PMID 22985673 DOI: 10.1016/J.Bios.2012.08.036  0.333
2013 Woo J, Choi J, Choi Y. Analytical Threshold Voltage Model of Junctionless Double-Gate MOSFETs With Localized Charges Ieee Transactions On Electron Devices. 60: 2951-2955. DOI: 10.1109/Ted.2013.2273223  0.389
2013 Moon D, Choi S, Duarte JP, Choi Y. Investigation of Silicon Nanowire Gate-All-Around Junctionless Transistors Built on a Bulk Substrate Ieee Transactions On Electron Devices. 60: 1355-1360. DOI: 10.1109/Ted.2013.2247763  0.421
2013 Duarte JP, Choi S, Moon D, Ahn J, Kim J, Kim S, Choi Y. A Universal Core Model for Multiple-Gate Field-Effect Transistors. Part II: Drain Current Model Ieee Transactions On Electron Devices. 60: 848-855. DOI: 10.1109/Ted.2012.2233863  0.38
2013 Duarte JP, Choi S, Moon D, Ahn J, Kim J, Kim S, Choi Y. A Universal Core Model for Multiple-Gate Field-Effect Transistors. Part I: Charge Model Ieee Transactions On Electron Devices. 60: 840-847. DOI: 10.1109/Ted.2012.2233478  0.366
2013 Kim TK, Kim DH, Yoon YG, Moon JM, Hwang BW, Moon DI, Lee GS, Lee DW, Yoo DE, Hwang HC, Kim JS, Choi YK, Cho BJ, Lee SH. First demonstration of junctionless accumulation-mode bulk FinFETs with robust junction isolation Ieee Electron Device Letters. 34: 1479-1481. DOI: 10.1109/Led.2013.2283291  0.447
2013 Han JW, Choi BJ, Yang JJ, Moon DI, Choi YK, Williams RS, Meyyappan M. A replacement of high-k process for CMOS transistor by atomic layer deposition Semiconductor Science and Technology. 28. DOI: 10.1088/0268-1242/28/8/082003  0.358
2013 Kim S, Moon DI, Lu W, Kim DH, Kim DM, Choi YK, Choi SJ. Latch-up based bidirectional npn selector for bipolar resistance-change memory Applied Physics Letters. 103: 33505. DOI: 10.1063/1.4813832  0.385
2013 Ahn JH, Kim JY, Seol ML, Baek DJ, Guo Z, Kim CH, Choi SJ, Choi YK. A pH sensor with a double-gate silicon nanowire field-effect transistor Applied Physics Letters. 102. DOI: 10.1063/1.4793655  0.396
2013 Moon D, Peycelon M, Kim J, Ahn J, Park TJ, Choi Y. A biristor based on a floating-body silicon nanowire for biosensor applications Applied Physics Letters. 102: 43701. DOI: 10.1063/1.4789904  0.389
2013 Kim M, Choi S, Moon D, Duarte JP, Kim S, Choi Y. Investigation of gate length and fringing field effects for program and erase efficiency in gate-all-around SONOS memory cells Solid-State Electronics. 79: 7-10. DOI: 10.1016/J.Sse.2012.03.008  0.349
2013 Seol M, Choi J, Kim J, Ahn J, Moon D, Choi Y. Piezoelectric nanogenerator with a nanoforest structure Nano Energy. 2: 1142-1148. DOI: 10.1016/J.Nanoen.2013.04.006  0.361
2013 Choi J, Kim M, Seol M, Choi Y. Back Cover: Transfer of functional memory devices to any substrate (Phys. Status Solidi RRL 5/2013) Physica Status Solidi-Rapid Research Letters. 7. DOI: 10.1002/Pssr.201390015  0.332
2013 Choi J, Kim M, Seol M, Choi Y. Transfer of functional memory devices to any substrate Physica Status Solidi-Rapid Research Letters. 7: 326-331. DOI: 10.1002/Pssr.201307084  0.332
2012 Guo Z, Seol ML, Kim MS, Ahn JH, Choi YK, Liu JH, Huang XJ. Hollow CuO nanospheres uniformly anchored on porous Si nanowires: preparation and their potential use as electrochemical sensors. Nanoscale. 4: 7525-31. PMID 23099737 DOI: 10.1039/C2Nr32556J  0.323
2012 Seol ML, Ahn JH, Choi JM, Choi SJ, Choi YK. Self-aligned nanoforest in silicon nanowire for sensitive conductance modulation. Nano Letters. 12: 5603-8. PMID 23066892 DOI: 10.1021/Nl3026955  0.383
2012 Seol ML, Choi SJ, Choi JM, Ahn JH, Choi YK. Hybrid porphyrin-silicon nanowire field-effect transistor by opto-electrical excitation. Acs Nano. 6: 7885-92. PMID 22882562 DOI: 10.1021/Nn303260A  0.358
2012 Choi K, Kim JY, Ahn JH, Choi JM, Im M, Choi YK. Integration of field effect transistor-based biosensors with a digital microfluidic device for a lab-on-a-chip application. Lab On a Chip. 12: 1533-9. PMID 22402581 DOI: 10.1039/C2Lc21203J  0.409
2012 Choi SJ, Moon DI, Duarte JP, Ahn JH, Choi YK. Physical observation of a thermo-morphic transition in a silicon nanowire. Acs Nano. 6: 2378-84. PMID 22324745 DOI: 10.1021/Nn2046295  0.349
2012 Seol ML, Choi SJ, Baek DJ, Park TJ, Ahn JH, Lee SY, Choi YK. A nanoforest structure for practical surface-enhanced Raman scattering substrates. Nanotechnology. 23: 095301. PMID 22322132 DOI: 10.1088/0957-4484/23/9/095301  0.301
2012 Kim CJ, Choi SJ, Ahn JH, Han JW, Kim H, Yoo S, Choi YK. Photoactive memory by a Si-nanowire field-effect transistor. Acs Nano. 6: 1449-54. PMID 22248475 DOI: 10.1021/Nn2042434  0.418
2012 Kim J, Ahn J, Choi S, Im M, Kim S, Duarte JP, Kim C, Park TJ, Lee SY, Choi Y. An Underlap Channel-Embedded Field-Effect Transistor for Biosensor Application in Watery and Dry Environment Ieee Transactions On Nanotechnology. 11: 390-394. DOI: 10.1109/Tnano.2011.2175006  0.356
2012 Kim C, Ahn J, Lee K, Jung C, Park HG, Choi Y. A New Sensing Metric to Reduce Data Fluctuations in a Nanogap-Embedded Field-Effect Transistor Biosensor Ieee Transactions On Electron Devices. 59: 2825-2831. DOI: 10.1109/Ted.2012.2209650  0.404
2012 Baek DJ, Choi SJ, Ahn JH, Kim JY, Choi YK. Addressable nanowire field-effect-transistor biosensors with local backgates Ieee Transactions On Electron Devices. 59: 2507-2511. DOI: 10.1109/Ted.2012.2201484  0.437
2012 Ahn J, Kim J, Choi K, Moon D, Kim C, Seol M, Park TJ, Lee SY, Choi Y. Nanowire FET Biosensors on a Bulk Silicon Substrate Ieee Transactions On Electron Devices. 59: 2243-2249. DOI: 10.1109/Ted.2012.2200105  0.411
2012 Kim S, Choi S, Moon D, Choi Y. Carrier Lifetime Engineering for Floating-Body Cell Memory Ieee Transactions On Electron Devices. 59: 367-373. DOI: 10.1109/Ted.2011.2176944  0.309
2012 Kim S, Choi S, Moon D, Choi Y. A New Charge-Pumping Technique for a Double-Gated SOI MOSFET Using Pulsed Drain Current Transients Ieee Transactions On Electron Devices. 59: 241-246. DOI: 10.1109/Ted.2011.2171489  0.372
2012 Han J, Choi Y, Meyyappan M. A Gate-Dielectric-Last Process via Photosolidification of Liquid Resin Ieee Electron Device Letters. 33: 746-748. DOI: 10.1109/Led.2012.2189866  0.352
2012 Duarte JP, Choi S, Moon D, Choi Y. A Nonpiecewise Model for Long-Channel Junctionless Cylindrical Nanowire FETs Ieee Electron Device Letters. 33: 155-157. DOI: 10.1109/Led.2011.2174770  0.343
2012 Kim S, Baek D, Kim JY, Choi SJ, Seol ML, Choi YK. A transistor-based biosensor for the extraction of physical properties from biomolecules Applied Physics Letters. 101. DOI: 10.1063/1.4745769  0.334
2012 Baek DJ, Duarte JP, Moon DI, Kim CH, Ahn JH, Choi YK. Accumulation mode field-effect transistors for improved sensitivity in nanowire-based biosensors Applied Physics Letters. 100. DOI: 10.1063/1.4723843  0.371
2012 Lim M, Choi S, Lee G, Seol M, Do Y, Choi Y, Han H. Terahertz time-domain spectroscopy of anisotropic complex conductivity tensors in silicon nanowire films Applied Physics Letters. 100: 211102. DOI: 10.1063/1.4721490  0.322
2012 Choi J, Hwang S, Kim C, Yang H, Jung C, Gyu Park H, Yoon J, Choi Y. An electrostatic micromechanical biosensor for electrical detection of label-free DNA Applied Physics Letters. 100: 163701. DOI: 10.1063/1.3703764  0.345
2012 Baek DJ, Seol M, Choi S, Moon D, Choi Y. Nonvolatile memory with graphene oxide as a charge storage node in nanowire field-effect transistors Applied Physics Letters. 100: 93106. DOI: 10.1063/1.3690670  0.441
2012 Kim J, Ahn J, Moon D, Kim S, Park TJ, Lee SY, Choi Y. A Dual-Gate Field-Effect Transistor for Label-Free Electrical Detection of Avian Influenza Journal of Bionanoscience. 2: 35-41. DOI: 10.1007/S12668-011-0035-0  0.407
2012 Choi K, Im M, Choi JM, Choi YK. Droplet transportation using a pre-charging method for digital microfluidics Microfluidics and Nanofluidics. 12: 821-827. DOI: 10.1007/S10404-011-0921-3  0.341
2011 Seol ML, Choi SJ, Kim CH, Moon DI, Choi YK. Porphyrin-silicon hybrid field-effect transistor with individually addressable top-gate structure. Acs Nano. 6: 183-9. PMID 22148941 DOI: 10.1021/Nn204535P  0.454
2011 Kim CJ, Choi SJ, Kim S, Han JW, Kim H, Yoo S, Choi YK. Photoinduced memory with hybrid integration of an organic fullerene derivative and an inorganic nanogap-embedded field-effect transistor for low-voltage operation. Advanced Materials (Deerfield Beach, Fla.). 23: 3326-31. PMID 21661065 DOI: 10.1002/Adma.201101034  0.394
2011 Kim JH, Moon H, Yoo S, Choi YK. Nanogap electrode fabrication for a nanoscale device by volume-expanding electrochemical synthesis. Small (Weinheim An Der Bergstrasse, Germany). 7: 2210-6. PMID 21608123 DOI: 10.1002/Smll.201002103  0.337
2011 Seol ML, Kim JH, Kang T, Im H, Kim S, Kim B, Choi YK. Multi-layer nanogap array for high-performance SERS substrate. Nanotechnology. 22: 235303. PMID 21483043 DOI: 10.1088/0957-4484/22/23/235303  0.333
2011 Kim CH, Jung C, Lee KB, Park HG, Choi YK. Label-free DNA detection with a nanogap embedded complementary metal oxide semiconductor. Nanotechnology. 22: 135502. PMID 21343645 DOI: 10.1088/0957-4484/22/13/135502  0.362
2011 Choi SJ, Ahn JH, Han JW, Seol ML, Moon DI, Kim S, Choi YK. Transformable functional nanoscale building blocks with wafer-scale silicon nanowires. Nano Letters. 11: 854-9. PMID 21254772 DOI: 10.1021/Nl104212E  0.415
2011 Baek DJ, Choi SJ, Moon DI, Choi Y. Scaling of the Pull-In Voltage in a Novel CMOS-compatible NEMS Switch The Japan Society of Applied Physics. 412-413. DOI: 10.7567/Ssdm.2011.P-11-5  0.412
2011 Han J, Ahn J, Choi Y. Damage immune field effect transistors with vacuum gate dielectric Journal of Vacuum Science & Technology B, Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phenomena. 29: 011014. DOI: 10.1116/1.3520618  0.411
2011 Ahn J, Choi S, Han J, Park TJ, Lee SY, Choi Y. Investigation of Size Dependence on Sensitivity for Nanowire FET Biosensors Ieee Transactions On Nanotechnology. 10: 1405-1411. DOI: 10.1109/Tnano.2011.2157519  0.355
2011 Duarte JP, Choi SJ, Choi YK. A full-range drain current model for double-gate junctionless transistors Ieee Transactions On Electron Devices. 58: 4219-4225. DOI: 10.1109/Ted.2011.2169266  0.38
2011 Choi JM, Choi SJ, Yarimaga O, Yoon B, Kim JM, Choi YK. Detection of a nanoscale hot spot by hot carriers in a poly-Si TFT using polydiacetylene-based thermoresponsive fluorometry Ieee Transactions On Electron Devices. 58: 1570-1574. DOI: 10.1109/Ted.2011.2116025  0.314
2011 Choi SJ, Choi CJ, Kim JY, Jang M, Choi YK. Analysis of transconductance gm) in Schottky-barrier MOSFETs Ieee Transactions On Electron Devices. 58: 427-432. DOI: 10.1109/Ted.2010.2092778  0.34
2011 Moon D, Choi S, Kim S, Oh J, Kim Y, Choi Y. Vertically Integrated Unidirectional Biristor Ieee Electron Device Letters. 32: 1483-1485. DOI: 10.1109/Led.2011.2163698  0.35
2011 Duarte JP, Choi S, Moon D, Choi Y. Simple Analytical Bulk Current Model for Long-Channel Double-Gate Junctionless Transistors Ieee Electron Device Letters. 32: 704-706. DOI: 10.1109/Led.2011.2127441  0.36
2011 Choi S, Moon D, Kim S, Ahn J, Lee J, Kim J, Choi Y. Nonvolatile Memory by All-Around-Gate Junctionless Transistor Composed of Silicon Nanowire on Bulk Substrate Ieee Electron Device Letters. 32: 602-604. DOI: 10.1109/Led.2011.2118734  0.419
2011 Moon D, Choi S, Kim C, Kim J, Lee J, Oh J, Lee G, Park Y, Hong D, Lee D, Kim Y, Kim J, Han J, Choi Y. Silicon Nanowire All-Around Gate MOSFETs Built on a Bulk Substrate by All Plasma-Etching Routes Ieee Electron Device Letters. 32: 452-454. DOI: 10.1109/Led.2011.2106758  0.448
2011 Choi S, Moon D, Kim S, Duarte JP, Choi Y. Sensitivity of Threshold Voltage to Nanowire Width Variation in Junctionless Transistors Ieee Electron Device Letters. 32: 125-127. DOI: 10.1109/Led.2010.2093506  0.4
2011 Kim S, Choi S, Choi Y. Interface-Trap Analysis by an Optically Assisted Charge-Pumping Technique in a Floating-Body Device Ieee Electron Device Letters. 32: 84-86. DOI: 10.1109/Led.2010.2084561  0.37
2011 Im M, Ahn J, Han J, Park TJ, Lee SY, Choi Y. Development of a Point-of-Care Testing Platform With a Nanogap-Embedded Separated Double-Gate Field Effect Transistor Array and Its Readout System for Detection of Avian Influenza Ieee Sensors Journal. 11: 351-360. DOI: 10.1109/Jsen.2010.2062502  0.412
2011 Yarimaga O, Yoon B, Ham DY, Lee J, Hara M, Choi YK, Kim JM. Electrophoretic deposition of amphiphilic diacetylene supramolecules: Polymerization, selective immobilization, pattern transfer and sensor applications Journal of Materials Chemistry. 21: 18605-18612. DOI: 10.1039/C1Jm13764F  0.315
2011 Yarimaga O, Lee S, Ham DY, Choi JM, Kwon SG, Im M, Kim S, Kim JM, Choi YK. Thermofluorescent Conjugated Polymer Sensors for Nano- and Microscale Temperature Monitoring Macromolecular Chemistry and Physics. 212: 1211-1220. DOI: 10.1002/Macp.201100099  0.33
2010 Ahn JH, Choi SJ, Han JW, Park TJ, Lee SY, Choi YK. Double-gate nanowire field effect transistor for a biosensor. Nano Letters. 10: 2934-8. PMID 20698606 DOI: 10.1021/Nl1010965  0.387
2010 Ryu SW, Kim CJ, Kim S, Seo M, Yun C, Yoo S, Choi YK. Fullerene-derivative-embedded nanogap field-effect-transistor and its nonvolatile memory application. Small (Weinheim An Der Bergstrasse, Germany). 6: 1617-21. PMID 20629051 DOI: 10.1002/Smll.200902410  0.345
2010 Im M, Kim DH, Lee JH, Yoon JB, Choi YK. Electrowetting on a polymer microlens array. Langmuir : the Acs Journal of Surfaces and Colloids. 26: 12443-7. PMID 20465273 DOI: 10.1021/La101339T  0.323
2010 Han JW, Ahn JH, Kim MW, Lee JO, Yoon JB, Choi YK. Nanowire mechanical switch with a built-in diode. Small (Weinheim An Der Bergstrasse, Germany). 6: 1197-200. PMID 20461728 DOI: 10.1002/Smll.201000170  0.405
2010 Park YB, Im M, Im H, Choi YK. Superhydrophobic cylindrical nanoshell array Langmuir. 26: 7661-7664. PMID 20441200 DOI: 10.1021/La100911S  0.305
2010 Seo K, Yoon H, Ryu SW, Lee S, Jo Y, Jung MH, Kim J, Choi YK, Kim B. Itinerant helimagnetic single-crystalline MnSi nanowires. Acs Nano. 4: 2569-76. PMID 20426410 DOI: 10.1021/Nn901653Q  0.365
2010 Ryu SW, Kim CH, Han JW, Kim CJ, Jung C, Park HG, Choi YK. Gold nanoparticle embedded silicon nanowire biosensor for applications of label-free DNA detection. Biosensors & Bioelectronics. 25: 2182-5. PMID 20227871 DOI: 10.1016/J.Bios.2010.02.010  0.321
2010 Kim JH, Kang G, Nam Y, Choi YK. Surface-modified microelectrode array with flake nanostructure for neural recording and stimulation. Nanotechnology. 21: 85303. PMID 20101076 DOI: 10.1088/0957-4484/21/8/085303  0.311
2010 Choi JM, Han JW, Choi SJ, Choi YK. Analytical modeling of a nanogap-embedded FET for application as a biosensor Ieee Transactions On Electron Devices. 57: 3477-3484. DOI: 10.1109/Ted.2010.2076152  0.359
2010 Choi S, Han J, Kim S, Moon D, Jang M, Choi Y. Dopant-Segregated Schottky Source/Drain FinFET With a NiSi FUSI Gate and Reduced Leakage Current Ieee Transactions On Electron Devices. 57: 2902-2906. DOI: 10.1109/Ted.2010.2065233  0.446
2010 Choi S, Han J, Moon D, Kim S, Jang M, Choi Y. P-Channel Nonvolatile Flash Memory With a Dopant-Segregated Schottky-Barrier Source/Drain Ieee Transactions On Electron Devices. 57: 1737-1742. DOI: 10.1109/Ted.2010.2051331  0.411
2010 Han J, Ryu S, Kim D, Choi Y. Polysilicon Channel TFT With Separated Double-Gate for Unified RAM (URAM)—Unified Function for Nonvolatile SONOS Flash and High-Speed Capacitorless 1T-DRAM Ieee Transactions On Electron Devices. 57: 601-607. DOI: 10.1109/Ted.2009.2038584  0.369
2010 Kim S, Choi SJ, Choi YK. Optically assisted charge pumping on floating-body FETs Ieee Electron Device Letters. 31: 1365-1367. DOI: 10.1109/Led.2010.2072903  0.342
2010 Kim C, Lee W, Choi Y. Nanocrystalline Diamond Gate FET for on-State Current Improvement Ieee Electron Device Letters. 31: 1152-1154. DOI: 10.1109/Led.2010.2058992  0.409
2010 Moon D, Choi S, Han J, Kim S, Choi Y. Fin-Width Dependence of BJT-Based 1T-DRAM Implemented on FinFET Ieee Electron Device Letters. 31: 909-911. DOI: 10.1109/Led.2010.2052015  0.388
2010 Han J, Choi Y. Biristor—Bistable Resistor Based on a Silicon Nanowire Ieee Electron Device Letters. 31: 797-799. DOI: 10.1109/Led.2010.2051405  0.328
2010 Han J, Ahn J, Choi Y. FinFACT—Fin Flip-Flop Actuated Channel Transistor Ieee Electron Device Letters. 31: 764-766. DOI: 10.1109/Led.2010.2048093  0.426
2010 Kwon S, Han J, Choi Y. A Bendable-Channel FinFET for Logic Application Ieee Electron Device Letters. 31: 624-626. DOI: 10.1109/Led.2010.2046614  0.392
2010 Choi S, Han J, Moon D, Choi Y. Analysis and Evaluation of a BJT-Based 1T-DRAM Ieee Electron Device Letters. 31: 393-395. DOI: 10.1109/Led.2010.2042675  0.341
2010 Choi S, Han J, Kim S, Moon D, Jang M, Choi Y. High-Performance Polycrystalline Silicon TFT on the Structure of a Dopant-Segregated Schottky-Barrier Source/Drain Ieee Electron Device Letters. 31: 228-230. DOI: 10.1109/Led.2009.2038348  0.382
2010 Choi S, Han J, Moon D, Jang M, Choi Y. Fin Width $(W_{\rm fin})$ Dependence of Programming Characteristics on a Dopant-Segregated Schottky-Barrier (DSSB) FinFET SONOS Device for a NOR -Type Flash Memory Device Ieee Electron Device Letters. 31: 71-73. DOI: 10.1109/Led.2009.2035142  0.386
2010 Han J, Ahn J, Lee JO, Yoon J, Choi Y. Exchangeable self-curable liquid gate dielectric embedded field effect transistor Applied Physics Letters. 97: 032112. DOI: 10.1063/1.3466912  0.332
2010 Kim S, Ahn J, Park TJ, Lee SY, Choi Y. Comprehensive study of a detection mechanism and optimization strategies to improve sensitivity in a nanogap-embedded biotransistor Journal of Applied Physics. 107: 114705. DOI: 10.1063/1.3443580  0.322
2010 Lee K, Choi S, Ahn J, Moon D, Park TJ, Lee SY, Choi Y. An underlap field-effect transistor for electrical detection of influenza Applied Physics Letters. 96: 033703. DOI: 10.1063/1.3291617  0.359
2010 Kim S, Yarimaga O, Choi S, Choi Y. Highly durable and flexible memory based on resistance switching Solid-State Electronics. 54: 392-396. DOI: 10.1016/J.Sse.2009.10.021  0.311
2010 Bae D, Ryu S, Gu B, Choi Y. Accelerated Publication: A new approach to cell size scaling with a multi-dual cell and a buffer/background programming of unified RAM Microelectronic Engineering. 87: 135-138. DOI: 10.1016/J.Mee.2009.06.027  0.309
2009 Yun DK, Kim KD, Kim S, Lee JH, Park HH, Jeong JH, Choi YK, Choi DG. Mass fabrication of resistive random access crossbar arrays by step and flash imprint lithography. Nanotechnology. 20: 445305. PMID 19809105 DOI: 10.1088/0957-4484/20/44/445305  0.377
2009 Im M, Kim DH, Lee JH, Yoon JB, Choi YK. Densely-Packed Microbowl Array with Balanced Dielectrophoretic Forces for Single-Cell Microarray Mrs Proceedings. 1222: 69-74. DOI: 10.1557/Proc-1222-Dd05-03  0.33
2009 Bae D, Kim S, Choi Y. Low-Cost and Highly Heat Controllable Capacitorless PiFET (Partially Insulated FET) 1T DRAM for Embedded Memory Ieee Transactions On Nanotechnology. 8: 100-105. DOI: 10.1109/Tnano.2008.2006502  0.332
2009 Ryu S, Han J, Kim C, Choi Y. Investigation of Isolation-Dielectric Effects of PDSOI FinFET on Capacitorless 1T-DRAM Ieee Transactions On Electron Devices. 56: 3232-3235. DOI: 10.1109/Ted.2009.2033412  0.302
2009 Choi S, Han J, Kim C, Kim S, Choi Y. Improvement of the Sensing Window on a Capacitorless 1T-DRAM of a FinFET-Based Unified RAM Ieee Transactions On Electron Devices. 56: 3228-3231. DOI: 10.1109/Ted.2009.2033011  0.309
2009 Kim S, Choi SJ, Choi YK. Resistive-memory embedded unified RAM (R-URAM) Ieee Transactions On Electron Devices. 56: 2670-2674. DOI: 10.1109/Ted.2009.2030441  0.338
2009 Han J, Ryu S, Kim C, Choi S, Kim S, Ahn J, Kim D, Choi KJ, Cho BJ, Kim J, Kim KH, Lee G, Oh J, Song M, Park YC, ... ... Choi Y, et al. Energy-Band-Engineered Unified-RAM (URAM) Cell on Buried $\hbox{Si}_{1 - y}\hbox{C}_{y}$ Substrate for Multifunctioning Flash Memory and 1T-DRAM Ieee Transactions On Electron Devices. 56: 641-647. DOI: 10.1109/Ted.2009.2014197  0.344
2009 Kim S, Moon H, Gupta D, Yoo S, Choi Y. Resistive Switching Characteristics of Sol–Gel Zinc Oxide Films for Flexible Memory Applications Ieee Transactions On Electron Devices. 56: 696-699. DOI: 10.1109/Ted.2009.2012522  0.383
2009 Ryu S, Han J, Kim C, Choi S, Kim S, Kim J, Kim KH, Oh J, Song M, Lee G, Park YC, Kim JW, Choi Y. Refinement of Unified Random Access Memory Ieee Transactions On Electron Devices. 56: 601-608. DOI: 10.1109/Ted.2008.2012292  0.368
2009 Han J, Moon D, Kim D, Choi Y. Parasitic BJT Read Method for High-Performance Capacitorless 1T-DRAM Mode in Unified RAM Ieee Electron Device Letters. 30: 1108-1110. DOI: 10.1109/Led.2009.2029353  0.346
2009 Choi S, Han J, Jang M, Choi Y. Analysis of Trapped Charges in Dopant-Segregated Schottky Barrier-Embedded FinFET SONOS Devices Ieee Electron Device Letters. 30: 1084-1086. DOI: 10.1109/Led.2009.2027724  0.346
2009 Han J, Moon D, Choi Y. High Aspect Ratio Silicon Nanowire for Stiction Immune Gate-All-Around MOSFETs Ieee Electron Device Letters. 30: 864-866. DOI: 10.1109/Led.2009.2024178  0.419
2009 Han J, Ryu S, Kim D, Kim C, Kim S, Moon D, Choi S, Choi Y. Fully Depleted Polysilicon TFTs for Capacitorless 1T-DRAM Ieee Electron Device Letters. 30: 742-744. DOI: 10.1109/Led.2009.2022343  0.408
2009 Lee E, Moon D, Yang J, Lim KS, Choi Y. Transparent Zinc Oxide Gate Metal–Oxide–Semiconductor Field-Effect Transistor for High-Responsivity Photodetector Ieee Electron Device Letters. 30: 493-495. DOI: 10.1109/Led.2009.2016765  0.395
2009 Han J, Kim C, Choi S, Kim D, Moon D, Choi Y. Gate-to-Source/Drain Nonoverlap Device for Soft-Program Immune Unified RAM (URAM) Ieee Electron Device Letters. 30: 544-546. DOI: 10.1109/Led.2009.2016441  0.344
2009 Choi S, Han J, Jang M, Kim JS, Kim KH, Lee GS, Oh JS, Song MH, Park YC, Kim JW, Choi Y. High Injection Efficiency and Low-Voltage Programming in a Dopant-Segregated Schottky Barrier (DSSB) FinFET SONOS for nor -type Flash Memory Ieee Electron Device Letters. 30: 265-268. DOI: 10.1109/Led.2008.2010720  0.413
2009 Han J, Ryu S, Choi S, Choi Y. Gate-Induced Drain-Leakage (GIDL) Programming Method for Soft-Programming-Free Operation in Unified RAM (URAM) Ieee Electron Device Letters. 30: 189-191. DOI: 10.1109/Led.2008.2010345  0.306
2009 Choi S, Han J, Kim S, Jang M, Kim JS, Kim KH, Lee GS, Oh JS, Song MH, Park YC, Kim JW, Choi Y. Enhancement of Program Speed in Dopant-Segregated Schottky-Barrier (DSSB) FinFET SONOS for NAND -Type Flash Memory Ieee Electron Device Letters. 30: 78-81. DOI: 10.1109/Led.2008.2008667  0.344
2009 Choi S, Han J, Jang M, Choi C, Choi Y. Characterization of current injection mechanism in Schottky-barrier metal-oxide-semiconductor field-effect transistors Applied Physics Letters. 95: 83502. DOI: 10.1063/1.3204439  0.414
2009 Kim S, Choi S, Jang M, Choi Y. Investigation of the source-side injection characteristic of a dopant-segregated Schottky barrier metal-oxide-semiconductor field-effect-transistor Applied Physics Letters. 95: 63508. DOI: 10.1063/1.3200245  0.366
2009 Kim S, Ahn J, Park TJ, Lee SY, Choi Y. A biomolecular detection method based on charge pumping in a nanogap embedded field-effect-transistor biosensor Applied Physics Letters. 94: 243903. DOI: 10.1063/1.3148340  0.316
2009 Lee J, Ryu S, Shin DO, Kim BH, Kim SO, Choi Y. Geometric effects of nanocrystals in nonvolatile memory using block copolymer nanotemplate Solid-State Electronics. 53: 640-643. DOI: 10.1016/J.Sse.2009.03.007  0.399
2009 Ryu S, Han J, Kim C, Kim S, Choi Y. Unified random access memory (URAM) by integration of a nanocrystal floating gate for nonvolatile memory and a partially depleted floating body for capacitorless 1T-DRAM Solid-State Electronics. 53: 389-391. DOI: 10.1016/J.Sse.2009.01.015  0.32
2008 Choi S, Han J, Kim S, Choi C, Jang M, Choi Y. Current Flow Mechanism in Schottky-Barrier MOSFETs and Application to the 1T-DRAM The Japan Society of Applied Physics. DOI: 10.7567/Ssdm.2008.J-1-3  0.33
2008 Ryu SW, Mo CB, Hong SH, Choi YK. Nonvolatile memory characteristics of NMOSFET with Ag nanocrystals synthesized via a thermal decomposition process for uniform device distribution Ieee Transactions On Nanotechnology. 7: 145-150. DOI: 10.1109/Tnano.2007.909947  0.323
2008 Han J, Kim C, Choi Y. Universal Potential Model in Tied and Separated Double-Gate MOSFETs With Consideration of Symmetric and Asymmetric Structure Ieee Transactions On Electron Devices. 55: 1472-1479. DOI: 10.1109/Ted.2008.922492  0.429
2008 Han J, Ryu S, Kim S, Kim C, Ahn J, Choi S, Kim JS, Kim KH, Lee GS, Oh JS, Song MH, Park YC, Kim JW, Choi Y. A Bulk FinFET Unified-RAM (URAM) Cell for Multifunctioning NVM and Capacitorless 1T-DRAM Ieee Electron Device Letters. 29: 632-634. DOI: 10.1109/Led.2008.922142  0.328
2008 Yu LE, Kim S, Ryu MK, Choi SY, Choi YK. Structure effects on resistive switching of A1/TiOχ/A1 devices for RRAM applications Ieee Electron Device Letters. 29: 331-333. DOI: 10.1109/Led.2008.918253  0.336
2008 Kang H, Han J, Choi Y. Analytical Threshold Voltage Model for Double-Gate MOSFETs With Localized Charges Ieee Electron Device Letters. 29: 927-930. DOI: 10.1109/Led.2008.2000965  0.387
2008 Im M, Han JW, Lee H, Yu LE, Kim S, Kim CH, Jeon SC, Kim KH, Lee GS, Oh JS, Park YC, Lee HM, Choi YK. Multiple-gate CMOS thin-film ransistor with polysilicon nanowire Ieee Electron Device Letters. 29: 102-105. DOI: 10.1109/Led.2007.911982  0.442
2008 Gupta D, Anand M, Ryu S, Choi Y, Yoo S. Nonvolatile memory based on sol-gel ZnO thin-film transistors with Ag nanoparticles embedded in the ZnO/gate insulator interface Applied Physics Letters. 93: 224106. DOI: 10.1063/1.3041777  0.376
2008 Kim C, Ryu S, Choi Y, Chang J, Bae SH, Sohn B. Metal nanocrystals synthesized with a micellar template based on a diblock copolymer for three-dimensional nonvolatile memory Applied Physics Letters. 93: 052106. DOI: 10.1063/1.2969051  0.354
2008 Kim S, Choi Y. Resistive switching of aluminum oxide for flexible memory Applied Physics Letters. 92: 223508. DOI: 10.1063/1.2939555  0.349
2008 Kim J, Huang X, Choi Y. Controlled Synthesis of Gold Nanocomplex Arrays by a Combined Top-Down and Bottom-Up Approach and Their Electrochemical Behavior Journal of Physical Chemistry C. 112: 12747-12753. DOI: 10.1021/Jp8036878  0.332
2008 Huang X, Kim J, Choi Y. Wafer-scale controlled Au/Pt bimetallic flowerlike structure array Gold Bulletin. 41: 58-65. DOI: 10.1007/Bf03215624  0.302
2007 Im H, Huang X, Gu B, Choi Y. A dielectric-modulated field-effect transistor for biosensing Nature Nanotechnology. 2: 430-434. PMID 18654328 DOI: 10.1038/Nnano.2007.180  0.422
2007 Choi Y, Kim K, Han J, Ryu S, Lee H. Extremely scaled 3-dimensional multiple-gate technologies for terabit era. Journal of Nanoscience and Nanotechnology. 7: 4126-4130. DOI: 10.1166/Jnn.2007.104  0.426
2007 Han J, Lee C, Park D, Choi Y. Quasi 3-D Velocity Saturation Model for Multiple-Gate MOSFETs Ieee Transactions On Electron Devices. 54: 1165-1170. DOI: 10.1109/Ted.2007.894595  0.338
2007 Han J, Lee J, Park D, Choi Y. Body Thickness Dependence of Impact Ionization in a Multiple-Gate FinFET Ieee Electron Device Letters. 28: 625-627. DOI: 10.1109/Led.2007.898284  0.375
2007 Ryu S, Huang X, Choi Y. Vertically standing carbon nanotubes as charge storage nodes for an ultimately scaled nonvolatile memory application Applied Physics Letters. 91: 63110. DOI: 10.1063/1.2767211  0.381
2007 Ryu S, Choi Y, Mo CB, Hong SH, Park PK, Kang S. A thickness modulation effect of HfO2 interfacial layer between double-stacked Ag nanocrystals for nonvolatile memory device applications Journal of Applied Physics. 101: 26109. DOI: 10.1063/1.2430785  0.349
2006 Han J, Lee C, Park D, Choi Y. Hot Carrier Reliability Study in Body-Tied Fin-Type Field Effect Transistors Japanese Journal of Applied Physics. 45: 3101-3105. DOI: 10.1143/Jjap.45.3101  0.413
2006 Han J, Lee C, Park D, Choi Y. Parasitic S/D resistance effects on hot-carrier reliability in body-tied FinFETs Ieee Electron Device Letters. 27: 514-516. DOI: 10.1109/Led.2006.875721  0.332
2006 Kim K, Lee H, Choi Y. Novel Structures for a 2-Bit per Cell of Nonvolatile Memory Using an Asymmetric Double Gate Ieice Transactions On Electronics. 89: 578-584. DOI: 10.1093/Ietele/E89-C.5.578  0.397
2005 Han J, Lee C, Park D, Choi Y. A Comprehensive Study of Hot-Carrier Effects in Body-Tied FinFETs The Japan Society of Applied Physics. 2005: 876-877. DOI: 10.7567/Ssdm.2005.B-8-4  0.394
2005 Lee H, Lee C, Park D, Choi Y. A study of negative-bias temperature instability of SOI and body-tied FinFETs Ieee Electron Device Letters. 26: 326-328. DOI: 10.1109/Led.2005.846587  0.322
2004 Ha D, Takeuchi H, Choi YK, King TJ. Molybdenum gate technology for ultrathin-body MOSFETs and FinFETs Ieee Transactions On Electron Devices. 51: 1989-1996. DOI: 10.1109/Ted.2004.839752  0.427
2003 Choi Y, Ha D, King T, Bokor J. Investigation of Gate-Induced Drain Leakage (GIDL) Current in Thin Body Devices: Single-Gate Ultra-Thin Body, Symmetrical Double-Gate, and Asymmetrical Double-Gate MOSFETs Japanese Journal of Applied Physics. 42: 2073-2076. DOI: 10.1143/Jjap.42.2073  0.426
2003 Ha D, Ranade P, Choi YK, Lee JS, King TJ, Hu C. Molybdenum Gate Work Function Engineering for Ultra-Thin-Body Silicon-on-Insulator (UTB SOI) MOSFETs Japanese Journal of Applied Physics. 42: 1979-1982. DOI: 10.1143/Jjap.42.1979  0.531
2003 Choi Y, Lee JS, Zhu J, Somorjai GA, Lee LP, Bokor J. Sublithographic nanofabrication technology for nanocatalysts and DNA chips Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures. 21: 2951. DOI: 10.1116/1.1627805  0.391
2003 Chang L, Choi YK, Kedzierski J, Lindert N, Xuan P, Bokor J, Hu C, King TJ. Moore's law lives on Ieee Circuits and Devices Magazine. 19: 35-42. DOI: 10.1109/Mcd.2003.1175106  0.793
2003 Lee J, Choi Y, Ha D, Balasubramanian S, King T, Bokor J. Hydrogen annealing effect on DC and low-frequency noise characteristics in CMOS FinFETs Ieee Electron Device Letters. 24: 186-188. DOI: 10.1109/Led.2003.809526  0.344
2003 Choi Y, Zhu J, Grunes J, Bokor J, Somorjai GA. Fabrication of Sub-10-nm Silicon Nanowire Arrays by Size Reduction Lithography The Journal of Physical Chemistry B. 107: 3340-3343. DOI: 10.1021/Jp0222649  0.355
2002 Ha D, Ranade P, Choi Y, Lee J, King T, Hu C. Ultra Thin Body Silicon-On-Insulator (UTB SOI) MOSFET with Metal Gate Work-function Engineering for sub-70 nm Technology Node The Japan Society of Applied Physics. 782-783. DOI: 10.7567/Ssdm.2002.D-7-2  0.484
2002 Choi Y, Ha D, King T, Bokor J. Reduction of Gate-Induced Drain Leakage (GIDL) Current in Single-Gate Ultra-Thin Body and Double-Gate FinFET Devices The Japan Society of Applied Physics. DOI: 10.7567/Ssdm.2002.A-3-3  0.425
2002 Lee J, Choi Y, Ha D, King T, Bokor J. Low-frequency noise characteristics in p-channel FinFETs Ieee Electron Device Letters. 23: 722-724. DOI: 10.1109/Led.2002.805741  0.318
2002 Choi Y, King T, Hu C. Nanoscale CMOS spacer FinFET for the terabit era Ieee Electron Device Letters. 23: 25-27. DOI: 10.1109/55.974801  0.532
2002 Choi Y, King T, Hu C. A spacer patterning technology for nanoscale CMOS Ieee Transactions On Electron Devices. 49: 436-441. DOI: 10.1109/16.987114  0.54
2002 Choi YK, King TJ, Hu C. Spacer FinFET: nanoscale double-gate CMOS technology for the terabit era Solid-State Electronics. 46: 1595-1601. DOI: 10.1016/S0038-1101(02)00111-9  0.517
2001 Lindert N, Chang L, Choi YK, Anderson EH, Lee WC, King TJ, Bokor J, Hu C. Sub-60-nm quasi-planar FinFETs fabricated using a simplified process Ieee Electron Device Letters. 22: 487-489. DOI: 10.1109/55.954920  0.807
2001 Choi Y, Ha D, King T, Hu C. Nanoscale ultrathin body PMOSFETs with raised selective germanium source/drain Ieee Electron Device Letters. 22: 447-448. DOI: 10.1109/55.944335  0.544
2001 Asano K, Choi Y, King T, Hu C. Patterning sub-30-nm MOSFET gate with i-line lithography Ieee Transactions On Electron Devices. 48: 1004-1006. DOI: 10.1109/16.918251  0.508
2001 Huang X, Lee W, Kuo C, Hisamoto D, Chang L, Kedzierski J, Anderson E, Takeuchi H, Choi Y, Asano K, Subramanian V, King T, Bokor J, Hu C. Sub-50 nm P-channel FinFET Ieee Transactions On Electron Devices. 48: 880-886. DOI: 10.1109/16.918235  0.673
2000 Choi YK, Asano K, Lindert N, Subramanian V, King TJ, Bokor J, Chenming H. Ultrathin-body SOI MOSFET for deep-sub-tenth micron era Ieee Electron Device Letters. 21: 254-255. DOI: 10.1109/55.841313  0.749
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